11/15
MTV118 Revision 2.0 01/01/1999
MTV118
MYSON
TECHNOLOGY
= 0
Accepts negative polarity Hsync input.
VSP -
= 1
Accepts positive polarity Vsync input.
= 0
Accepts negative polarity Vsync input.
PWM1, PWM0 - Selects the PWMCK output frequency.
= (0, 0)
XIN frequency /8
= (0, 1)
XIN frequency /4
= (1, 0)
XIN frequency /2
= (1, 1)
XIN frequency /1
The initial value is 0, 0 after power-up.
Notes :
When XIN is not present, don't write data in any address. If data is written in any address, a
malfunction may occur.
3.10 PWM D/A Converter
There are 8 open-drain PWM D/A outputs (PWM0 to PWM7). The PWM D/A converter output pulse
width is programmable by writing data to columns 19-26 registers of row 15 with 8-bit resolution to con-
trol the pulse width duration from 0/256 to 255/256. The sampling rate is selected by PWM1, PWM0 as
shown in table 4. In applications, all open-drain output pins should be pulled up by external resistors to
supply voltage (5V to 9V) for the desired output range.
ROW 15
PWMDA0 - PWMDA7 - Defines the output pulse width of pins PWM0 to PWM7.
3.11 Color Encoder
The decoder generates the video output to ROUT, GOUT and BOUT by integrating window color, bor-
der blackedge, luminance output and color selection output (R, G, B) to form the desired video outputs.
4.0 ABSOLUTE MAXIMUM RATINGS
DC Supply Voltage(VDD,VDDA)
Ground Voltage
Storage Temperature
Ambient Operating Temperature
-0.3 to +7 V
-0.3 to VDD+0.3 V
-65 to +150
o
C
0 to +70
o
C
TABLE 4.
PWMCK Frequency and PWMDA Sampling Rate
(PWM1, PWM0)
PWMCK Freq.
XIN frequency /8
XIN frequency /4
XIN frequency /2
XIN frequency /1
PWMDA sampling rate
XIN frequency /(8 * 256)
XIN frequency /(4 * 256)
XIN frequency /(2 * 256)
XIN frequency /(1 * 256)
( 0, 0 )
( 0, 1 )
( 1, 0 )
( 1 ,1 )
Column 19
|
Column 26
b7
b6
b5
b4
PWMDA0
|
PWMDA7
b3
b2
b1
b0
MSB
LSB