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參數(shù)資料
| 型號： | MTB50N06VL |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | JFETs |
| 英文描述： | 42 A, 60 V, 0.032 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | D2PAK-3 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 100K |
| 代理商： | MTB50N06VL |
MTB50N06VL
http://onsemi.com
5
VDS
,DRAIN-T
O-SOURCE
VOL
TAGE
(VOL
TS)
V GS
,GA
TE-T
O-SOURCE
VOL
TAGE
(VOL
TS)
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
0.5
0.7
0.85
0.9
10
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
I S
,SOURCE
CURRENT
(AMPS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
RG, GATE RESISTANCE (OHMS)
1
10
100
t,TIME
(ns)
TJ = 25°C
ID = 42 A
VDD = 30 V
VGS = 5 V
TJ = 25°C
VGS = 0 V
Figure 10. Diode Forward Voltage versus Current
0
QT, TOTAL CHARGE (nC)
10
20
40
50
30
TJ = 25°C
ID = 42 A
0
15
20
1000
100
10
1
2
0
12
6
4
30
25
0
tf
td(off)
td(on)
tr
VGS
Q2
5
Q3
QT
Q1
VDS
0.8
0.75
0.55
0.65
0.6
10
15
20
8
10
25
5
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed
in
AN569,
“Transient
Thermal
Resistance–General Data and Its Use.”
Switching between the off–state and the on–state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 s. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) – TC)/(R
θJC).
A Power MOSFET designated E–FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non–linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E–FETs can withstand the stress of
drain–to–source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 12). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.
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| MTB52N06VT4 | 52 A, 60 V, 0.022 ohm, N-CHANNEL, Si, POWER, MOSFET |
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| MTB50P03HDLT4 | 功能描述:MOSFET 30V 50A Logic Level RoHS:否 制造商:STMicroelectronics 晶體管極性:N-Channel 汲極/源極擊穿電壓:650 V 閘/源擊穿電壓:25 V 漏極連續(xù)電流:130 A 電阻汲極/源極 RDS（導通）:0.014 Ohms 配置:Single 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:Max247 封裝:Tube |
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