參數(shù)資料
型號(hào): MT9196
廠商: Mitel Networks Corporation
英文描述: Integrated Digital Phone Circuit (IDPC)(集成數(shù)字電話電路)
中文描述: 綜合數(shù)字電話電路(前列腺偶發(fā)癌)(集成數(shù)字電話電路)
文件頁(yè)數(shù): 5/43頁(yè)
文件大?。?/td> 278K
代理商: MT9196
MT9196
7-139
On PWRST (pin 5) the Filter/CODEC defaults such
that the side-tone path, dial tone filter and 400 Hz
transmit filter are off, all programmable gains are set
to 0dB and CCITT
μ
-Law is selected. Further, the
Filter/CODEC is powered down due to the control
bits of the Path Control Registers (addresses 12h
and 13h) being reset.
The internal architecture is fully differential to provide
the best possible noise rejection as well as to allow a
wide dynamic range from a single 5 volt supply
design.
This
fully
differential
continued into the Transducer Interface section to
provide full chip realization of these capabilities for
the handset and loudspeaker functions.
architecture
is
A reference voltage (V
Ref
), for the conversion
requirements of the CODEC section, and a bias
voltage (V
Bias
), for biasing the internal analog
sections, are both generated on-chip. V
Bias
is also
brought to an external pin so that it may be used for
biasing external gain plan setting amplifiers. A 0.1
μ
F
capacitor must be connected from V
Bias
to analog
ground at all times. Likewise, although V
Ref
may only
be used internally, a 0.1
μ
F capacitor from the V
Ref
pin to ground is required at all times. The analog
ground reference point for these two capacitors must
be physically the same point. To facilitate this the
V
Ref
and V
Bias
pins are situated on adjacent pins.
The transmit filter is designed to meet CCITT G.714
specifications. The nominal gain for this filter path is
0 dB (gain control = 0 dB). Gain control allows the
output signal to be increased up to 7 dB. An anti-
aliasing filter is included. This is a second order
lowpass implementation with a corner frequency at
25 kHz. Attenuation is better than 32 dB at 256 kHz
and less than 0.01 dB within the passband.
An optional 400Hz high-pass function may be
included into the transmit path by enabling the Tfhp
bit in the Control Register 1 (address 0Eh). This
option
allows
the
reduction
background noise such as motor and fan noise.
of
transmitted
Figure 3 - Audio Gain Partitioning
SERIAL
PORT
DIGITAL GAIN
& TONES
FILTER/CODEC
TRANSDUCER INTERFACE
Handset
Receiver
(150
)
Speakerphone
Speaker
(40
nominal)
34
min)
Digital Domain
Analog Domain
PCM
PCM
Receive
-24 to
+21 dB
(3dB steps)
DTMF,
Tone
Ringer
-24 to
+21 dB
(3 dB steps)
Receive
Filter Gain
0 to -7 dB
(1 dB steps)
Side-tone
-9.96 to
+9 96dB
(3.32 dB steps)
-11 dB
Transmit Filter
Gain
0 to +7 dB
(1 dB steps)
-6 dB
0/+8dB
+8 to -20dB
(4 dB steps)
RINGER
0 to -28 dB
(4 dB steps)
Trans-
mit
Gain
Trans-
mit
Gain
6.37 dB
M
U
X
5 dB
5 dB
AUXin
MIC+
M +
M -
AUXout
AUX input
H/F answer-
back mic
Transitter
microphone
Auxiliary
Out
Driver
-12 dB
Speaker
Phone
Driver
0 dB
Receiver
Driver
-6.1 dB or
-3.6 dB
HSPKR +
HSPKR -
SPKR +
SPKR -
75
75
Internal To Device
External To Device
Transmit
-0.37 dB
or 8.93 dB
D
in
D
out
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