參數(shù)資料
型號(hào): MT9171
廠商: Mitel Networks Corporation
英文描述: Digital Subscriber Interface Circuit with RxSB(數(shù)字用戶接口電路(帶接收同步位))
中文描述: 數(shù)字用戶接口電路(數(shù)字用戶接口電路與RxSB(帶接收同步位))
文件頁(yè)數(shù): 2/25頁(yè)
文件大小: 209K
代理商: MT9171
MT9171/72
Advance Information
9-116
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
22
24
28
1
2
3
1
2
3
2
3
4
L
OUT
V
Bias
V
Ref
Line Out.
Transmit Signal output (Analog). Referenced to V
Bias
.
Internal Bias Voltage
output. Connect via 0.33
μ
F decoupling capacitor to V
DD
.
Internal Reference Voltage
output. Connect via 0.33
μ
F decoupling capacitor to
V
DD
.
MS2-MS0
Mode Select
inputs (Digital). The logic levels present on these pins select the
various operating modes for a particular application. See Table 1 for the
operating modes.
RegC
Regulator Control
output (Digital). A 512 kHz clock used for switch mode power
supplies. Unused in MAS/MOD mode and should be left open circuit.
4,5,
6
4,5,
6
5,7,
8
7
7
9
8
9
10
F0/CLD
Frame Pulse/C-Channel Load
(Digital). In DN mode a 244 ns wide negative
pulse input for the MASTER indicating the start of the active channel times of the
device. Output for the SLAVE indicating the start of the active channel times of
the device. Output in MOD mode providing a pulse indicating the start of the C-
channel.
Control/Data ST-BUS In/Control/Data In
(Digital). A 2.048 Mbit/s serial control
& signalling input in DN mode. In MOD mode this is a continuous bit stream at
the bit rate selected.
Control/Data ST-BUS Out/Control/Data Out
(Digital). A 2.048 Mbit/s serial
control & signalling output in DN mode. In MOD mode this is a continuous bit
stream at the bit rate selected.
Negative Power Supply
(0V).
DSTo/Do
Data ST-BUS Out/Data Out
(Digital). A 2.048 Mbit/s serial PCM/data output in
DN mode. In MOD mode this is a continuous bit stream at the bit rate selected.
9
10
12
CDSTi/
CDi
10
11
13
CDSTo/
CDo
11
12
12
13
14
15
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
22
21
20
19
18
17
16
15
22 PIN PDIP
LOUT
VBias
VRef
MS2
MS1
MS0
RegC
F0/CLD
CDSTi/CDi
CDSTo/CDo
VSS
VDD
LIN
TEST
LOUT DIS
Precan
OSC1
OSC2
C4/TCK
F0o/RCK
DSTi/Di
DSTo/Do
28 PIN PLCC
2
4
3
2
1
2
2
5
6
7
8
9
10
11
25
24
23
22
21
20
19
1
1
1
1
1
1
1
L
V
V
N
V
L
T
NC
LOUT DIS
Precan
OSC1
OSC2
NC
C4/TCK
MS2
NC
MS1
MS0
RegC
F0/CLD
NC
C
C
V
D
N
F
D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
24
23
22
21
20
19
18
17
24 PIN SSOP
LOUT
VBias
VRef
MS2
MS1
MS0
RegC
NC
F0/CLD
CDSTi/CDi
CDSTo/CDo
VSS
VDD
LIN
TEST
LOUT DIS
Precan
OSC1
NC
OSC2
C4/TCK
F0o/RCK
DSTi/Di
DSTo/Do
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