- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383645 > MT9094 (Mitel Networks Corporation) Digital Telephone (DPhone-II)(數(shù)字電話) PDF資料下載
參數(shù)資料
| 型號： | MT9094 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Digital Telephone (DPhone-II)(數(shù)字電話) |
| 中文描述： | 數(shù)字電話（DPhone -Ⅱ）（數(shù)字電話） |
| 文件頁數(shù)： | 16/34頁 |
| 文件大?。?/td> | 234K |
| 代理商： | MT9094 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
MT9094
7-60
ADDRESSES 17h - 1Ch are RESERVED
Note: Bits marked "-" are reserved bits and should be written with logic "0".
All bits active high:
Ch
2
EN and Ch
3
EN
Channels 2 and 3 are the B1 and B2 channels, respectively. PCM associated with the DSP, Filter/CODEC and trans-
ducer audio paths is conveyed in one of these channels as selected in the timing control register.
Transmit B1 and B2 data on DSTo
When high PCM from the Filter/CODEC and DSP is transmitted on DSTo in the associated channel. When low
DSTo is forced to logic 0 for the corresponding timeslot. If both Ch
2
EN and Ch
3
EN are enabled, data defaults to
channel 2.
Receive B1 and B2 data on DSTi
When enabled PCM from DSTi is routed to the DSP and Filter/CODEC in the associated channel. If both Ch
2
EN
and Ch
3
EN are enabled, data input defaults to channel 2.
Channel 1 conveys the control/status information for the layer 1 transceiver. The full 64kb/s bandwidth is available and
is assigned according to which transceiver is being used. Consult the data sheets for the transceiver selected. When
high register data is transmitted on DSTo. When low this timeslot is tri-stated on DSTo. Receive C-Channel data (DSTi)
is always routed to the register regardless of this control bit's logic state.
Ch
1
EN
Timing Control Register
ADDRESS = 15h WRITE/READ VERIFY
Power Reset Value
XX0X 0000
7
6
5
4
3
2
1
0
-
-
-
-
CH
3
EN
CH
1
EN
CH
2
EN
-
LB
io
Active high enables data from the ST-BUS input to be looped back to the ST-BUS output directly at the pins. The DSTo
tri-state driver must also be enabled using one of the channel enable signals.
Active high enables data from ST-BUS output to be looped back to the ST-BUS input directly at the pins.
LB
oi
Loop-back Register
ADDRESS = 16h WRITE/READ VERIFY
Power Reset Value
X00X XXXX
7
6
5
4
3
2
1
0
-
LBio
LBoi
-
-
-
-
-
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT9122 | Dual Voice Echo Canceller with Tone Detection(雙話音回聲消除器（帶音調(diào)檢測功能）) |
| MT9122AE | CMOS Dual Voice Echo Canceller with Tone Detection |
| MT9122AP | CMOS Dual Voice Echo Canceller with Tone Detection |
| MT9123AE | CMOS Dual Voice Echo Canceller |
| MT9123 | Dual Voice Echo Canceller(雙話音回聲消除器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9094AP | 制造商:Microsemi Corporation 功能描述: 制造商:Mitel Networks Corporation 功能描述: |
| MT9094AP1 | 制造商:Microsemi Corporation 功能描述:DGTL TEL 44PLCC - Rail/Tube |
| MT9094APR1 | 制造商:Microsemi Corporation 功能描述:DGTL TEL 44PLCC - Tape and Reel 制造商:Zarlink Semiconductor Inc 功能描述:DGTL TEL 44PLCC - Tape and Reel |
| MT9122 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS Dual Voice Echo Canceller with Tone Detection |
| MT9122AE | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 2CH G.164/G.165/G.711 W/ TONE DETECTION - Rail/Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。