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參數(shù)資料
| 型號(hào)： | MT90871AV |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 路由/交換 |
| 英文描述： | Flexible 8K Digital Switch (F8KDX) |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PBGA196 |
| 封裝： | 15 X 15 MM, 1 MM PITCH, LBGA-196 |
| 文件頁(yè)數(shù)： | 34/65頁(yè) |
| 文件大?。?/td> | 639K |
| 代理商： | MT90871AV |
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MT90871
Data Sheet
34
Zarlink Semiconductor Inc.
13.0
Detailed Register Description
This section describes the registers that are used in the device.
13.1
Control Register (CR)
Address 0000h.
The Control Register defines which memory is to be accessed, initiates the memory block programming mode,
sets the applied clock and frame pulse conditions, and enables stream outputs. The Control Register (
CR
) is
configured as follows:
Bit
Name
Reset
Description
15-9
Reserved
0
Reserved
.
8
FPW
0
Frame Pulse Width
When LOW, an input frame pulse width of 122ns shall be applied to FP8i. When
HIGH, an input frame pulse width of 244ns shall be applied to FP8i.
7
Reserved
0
Reserved
. Must be set LOW.
6
C8IPOL
0
8MHz Input Clock Polarity
The frame boundary is aligned to the clock falling or rising edge. When set LOW,
the frame boundary is aligned to the clock falling edge. When set HIGH, the frame
boundary is aligned to the clock rising edge.
5
COPOL
0
Output Clock Polarity
When set LOW, the output clock is the same polarity as the input clock. When set
HIGH, the output clock is inverted. This applies to both 8MHz (C8o)and 16MHz
(C16o) output clocks.
4
MBP
0
Memory Block Programming
When LOW, the memory block programming mode is disabled. When HIGH, the
connection memory block programming mode is ready to program the Local
Connection Memory (LCM), and the Backplane Connection Memory (BCM).
3
OSB
0
Output Stand By
This bit enables the BSTo0 - 15 and the LSTo0 - 15 serial outputs
.
When LOW, the BSTo0-15 and LSTo0-15 are driven high or high impedance,
dependent on the BORS and LORS pin settings respectively, and BCSTo0-1 and
LCSTo0-1 are driven low. When HIGH, the BSTo0-15, LSTo0-15, BCSTo0-1 and
LCSTo0-1 are enabled.
Table 13- Control Register Bits
Output Control with ODE pin and OSB bit
ODE Pin
OSB bit
BSTo0 - 15, LSTo0 - 15
0
X
Disable
1
0
Disable
1
1
Enable
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90871AV2 | 制造商:Microsemi Corporation 功能描述:PB FREE FLEXIBLE 8K DIGITAL SWITCH - Bulk 制造商:Microsemi Corporation 功能描述:IC, TDM SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA |
| MT90880 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT90880B | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT90880B/IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT90880BP1N | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
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