參數(shù)資料
型號(hào)： MT9046AN
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 通信及網(wǎng)絡(luò)
英文描述： T1/E1 System Synchronizer with Holdover
中文描述： SPECIALTY TELECOM CIRCUIT, PDSO48
封裝： 0.300 INCH, MO-118AA, SSOP-48
文件頁數(shù)： 27/34頁
文件大?。?/td> 508K
代理商： MT9046AN
MT9046
Data Sheet
27
Zarlink Semiconductor Inc.
Figure 15 - Output Timing 2
Figure 16 - Input Controls Setup and Hold Timing
See “Notes” following AC Electrical Characteristics tables.
AC Electrical Characteristics - Intrinsic Jitter Unfiltered
Characteristics
Sym.
Max.
Units
Conditions/Notes
1
Intrinsic jitter at F8o (8 kHz)
0.0002
UIpp
1-15,22-25,29
2
Intrinsic jitter at F0o (8 kHz)
0.0002
UIpp
1-15,22-25,29
3
Intrinsic jitter at F16o (8 kHz)
0.0002
UIpp
1-15,22-25,29
4
Intrinsic jitter at C1.5o (1.544 MHz)
0.030
UIpp
1-15,22-25,30
5
Intrinsic jitter at C2o (2.048 MHz)
0.040
UIpp
1-15,22-25,31
6
Intrinsic jitter at C6o (6.312 MHz)
0.120
UIpp
1-15,22-25,32
7
Intrinsic jitter at C4o (4.096 MHz)
0.080
UIpp
1-15,22-25,33
8
Intrinsic jitter at C8o (8.192 MHz)
0.104
UIpp
1-15,22-25,34
9
Intrinsic jitter at C16o (16.384 MHz)
0.104
UIpp
1-15,22-25,35
10
Intrinsic jitter at TSP (8 kHz)
0.0002
UIpp
1-15,22-25,35
11
Intrinsic jitter at RSP (8 kHz)
0.0002
UIpp
1-15,22-25,35
12
Intrinsic jitter at C19o (19.44 MHz)
0.27
UIpp
1-15,22-25,36
t
RSPD
t
TSPD
TSP
C2o
t
TSPW
t
RSPW
V
T
V
T
V
T
V
T
RSP
F8o
t
H
t
S
F8o
MS1,2,
RSEL, PCCi
V
T
V
T
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