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參數(shù)資料
| 型號(hào)： | MT9045AN |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | T1/E1/OC3 System Synchronizer |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO48 |
| 封裝： | 0.300 INCH, MO-118AA, SSOP-48 |
| 文件頁數(shù)： | 9/34頁 |
| 文件大小： | 495K |
| 代理商： | MT9045AN |
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MT9045
Data Sheet
9
Zarlink Semiconductor Inc.
Input Impairment Monitor
This circuit monitors the input signal to the DPLL and automatically enables the Holdover Mode (Auto-Holdover)
when the frequency of the incoming signal is outside the Auto-Holdover capture range. (See AC Electrical
Characteristics - Performance). This includes a complete loss of incoming signal, or a large frequency shift in the
incoming signal. When the incoming signal returns to normal, the DPLL is returned to Normal Mode with the output
signal locked to the input signal. The holdover output signal in the MT9045 is based on the incoming signal 30ms
minimum to 60ms prior to entering the Holdover Mode. The amount of phase drift while in holdover is negligible
because the Holdover Mode is very accurate (e.g.,
±
0.05ppm). Consequently, the phase delay between the input
and output after switching back to Normal Mode is preserved.
State Machine Control
As shown in Figure 1, this state machine controls the Reference Select MUX, the TIE Corrector Circuit and the
DPLL. Control is based on the logic levels at the control inputs RSEL, MS1, MS2 and PCCi (See Figure 6). When
switching from Primary Holdover to Primary Normal, the TIE Corrector Circuit is enabled when PCCi = 1, and
disabled when PCCi = 0.
All state machine changes occur synchronously on the rising edge of F8o. See the Control and Mode of Operation
section for full details.
Figure 6 - Control State Machine Block Diagram
Master Clock
The MT9045 can use either a clock or crystal as the master timing source. For recommended master timing
circuits, see the Applications - Master Clock section.
Control and Mode of Operation
The active reference input (PRI or SEC) is selected by the RSEL pin as shown in Table 2.
RSEL
Input Reference
0
PRI
1
SEC
Table 2 - Input Reference Selection
MS1
MS2
To
Reference
Select MUX
To TIE
Corrector
Enable
Control
State Machine
To DPLL
State
Select
PCCi
RSEL
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9045AN1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Rail/Tube 制造商:Microsemi Corporation 功能描述:T1/E1/OC3 SYSTEM SYNCHRONIZER |
| MT9045ANR1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Tape and Reel 制造商:Microsemi Corporation 功能描述:iB FREE T1/E1/OC3 SYSTEM SYNCHRONIZER 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/OC3/T1 3.3V 48SSOP - Tape and Reel |
| MT9046 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH Clock Multiplier PLL |
| MT9046AN | 制造商:Microsemi Corporation 功能描述: |
| MT9046AN1 | 制造商:Microsemi Corporation 功能描述:FRAMER E1 /T1 3.3V 48SSOP - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SYNCHRONIZER T1/E1 48SSOP 制造商:Microsemi Corporation 功能描述:IC SYNCHRONIZER T1/E1 48SSOP |
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