參數(shù)資料
型號： MT90210
廠商： Mitel Networks Corporation
英文描述： Multi-Rate Parallel Access Circuit
中文描述： 多速率電路并行訪問
文件頁數(shù)： 9/27頁
文件大?。?/td> 133K
代理商： MT90210
Preliminary Information
MT90210
2-153
JTAG Support
The MT90210 JTAG interface is designed according
to the Boundary-Scan standard IEEE1149.1. The
standard specifies a design-for-testability technique
called Boundary-Scan Test (BST). A boundary-scan
IC has a shift-register stage or ‘Boundary-Scan Cell’
(BSC) in between the core logic and the I/O buffers
adjacent to each I/O pin. The BSCs can control and
observe what happens at each I/O pin of the IC. The
operation of the boundary-scan circuitry is controlled
by a Test Access Port (TAP) Controller.
Test Access Port (TAP)
The Test Access Port (TAP) provides access to many
test support functions built into the MT90210. It
consists of three input connections and one output
connection. The following connections form the TAP:
Test Clock Input (TCK)
Test Mode Select Input (TMS)
Test Data Input (TDI)
Test port Reset (TRST)
Test Data Output (TDO)
Figure 7b - WBC and RBC operation in relation to accessing data from Block 0 and Block 1
RBC
WBC
Exclusive access of
Block 0
Exclusive access of
Block 1
Access
of both
Block 0
&
Block 1
Exclusive access of
Block 0
t
NA
t
NA
~ 1 timeslot for modes 1, 2 & 3
t
NA
~ 3 timeslots for modes 4 & 5
125 us
125 us
Access
of both
Block 0
&
Block 1
t
NA
Figure 8 - Parallel Port Functional Read/Write Operation
PCLK
SCLK
A
WR
A
WR
A
RD
A
RD
A0-A12
R/W2
R/W1
Strobe
RD
RD
WR
P0-P7
Note: The MT90210 device performs groups of writes and groups of reads separated by 4 inactive PCLK periods
for modes 3, 4 and 5. In mode 1 and mode 2, the write and read groups are separated by 8 PCLK periods.
WR
Toggles only during
write data cycle
Changes state (high to low)
on every change of a block
of reads or block of writes
Low during read cycle,
high during inactive
periods and toggles
during write cycles
相關(guān)PDF資料
PDF描述
MT90210AL Multi-Rate Parallel Access Circuit
MT90220 Octal IMA/UNI PHY Device(八端口 IMA/UNI 物理層設(shè)備（八端口ATM IMA和UNI處理器）)
MT90221 Quad IMA/UNI PHY Device(四端口 IMA/UNI 物理層設(shè)備（四端口ATM IMA和UNI處理器）)
MT90401 SONET/SDH System Synchronizer(SONET/SDH 系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）)
MT9040 T1/E1 Synchronizer(T1/E1 系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90210AL 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Multi-Rate Parallel Access Circuit
MT90220 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Octal IMA/UNI PHY Device
MT90220AL 制造商:Zarlink Semiconductor Inc 功能描述:I.C.
MT90220ALX01 制造商:Mitel Networks Corporation 功能描述:
MT90221 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device
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