參數(shù)資料
型號(hào): MT90210
廠商: Mitel Networks Corporation
英文描述: Multi-Rate Parallel Access Circuit
中文描述: 多速率電路并行訪問
文件頁數(shù): 23/27頁
文件大?。?/td> 133K
代理商: MT90210
Preliminary Information
MT90210
2-167
Figure 23- Parallel Port Data Write Cycle
DC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
* Typical figures are at 25
°
C and are for design aid only.
AC Electrical Characteristics
Characteristics
Sym
Min
Typ*
Max
Units
Test Conditions
1
Address Output Delay from Clock
t
ad
15
ns
output load 50pF
2
Output Delay on R/W1 and Strobe
t
r/wd
, t
stb
t
pwe
9.5
ns
3
Pulse Width Low - R/W1 and Strobe
modes 2, 3, 4 & 5
mode 1
13.5
30
ns
pulse width low on
PCLK for 30 ns
4
Internal Data Output Delay from Clock
Falling
t
dod
10
ns
output load 50 pF
5
Address Hold from Write Inactive
t
ah
2.25
ns
6
Input Data & OE setup times
t
st
, t
oes
t
hd
, t
oeh
0
ns
7
Input Data & OE hold times
5
ns
CKout
A0-A12
P0-P7
(Read/
Write)
(16.384 MHz,
mode 1)
(32.768 MHz,
mode 2/3/4/5)
SCLK
WR(y)
WR(z)
Strobe
Y
Z
X
S
R/
W1
t
ah
t
pwe
t
dod
t
stb
Note: R/W2 output signal is HIGH during write cycles.
or
C16+, C16 -
t
r/wd
t
ad
t
pwe
WR(x)
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