![](http://datasheet.mmic.net.cn/370000/MT8971B_datasheet_16723769/MT8971B_3.png)
MT8971B/72B
9-109
Figure 3 - DV Port - 80 kbit/s (Modes 2, 3, 6)
Figure 4 - DV Port - 160 kbit/s (Modes 2, 3, 6)
17
22
OSC1
Oscillator Input
. CMOS Input. D.C. couple signals to this pin. Refer to D.C. Electrical
Characteristics for OSC1 input requirements.
Precanceller Disable.
When held to Logic ’1’
,
the internal path from L
OUT
to the
precanceller is forced to V
Bias
thus bypassing the precanceller section. When logic ’0’, the
L
OUT
to the precanceller path is enabled and functions normally. An internal pulldown (50
k
) is provided on this pin.
No Connection.
Leave open circuit.
18
23
Precan
1,6,
11,
18,
20,
25
24
NC
19
L
OUT
DIS
L
OUT
Disable.
When held to logic “1”, L
OUT
is disabled (i.e., output = V
Bias
). When logic
“0”, L
OUT
functions normally. An internal pulldown (50 k
) is provided on this pin.
TEST
Test Pin.
Connect to V
SS
for normal operation.
L
IN
Receive Signal
input (Analog).
V
DD
Positive Power Supply
(+5V) input.
20
21
22
26
27
28
Pin Description (continued)
Pin #
Name
Description
DIP PLCC
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
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AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
A
A
A
A
A
A
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AA
AA
AA
AA
AA
AAAA
AA
AA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
A
A
A
A
A
A
AAAAA
F0
C4
DSTi
DSTo
F0o
B1
7
B1
6
B1
5
B1
4
B1
3
B1
2
B1
1
B1
0
B1
7
B1
6
B1
5
B1
4
B1
3
B1
2
B1
1
B1
0
B1
7
B1
7
Channel Time 0
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
A
A
A
A
A
A
A
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAA
AAA
AAA
AAA
AAA
AAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAA
AAA
AAA
AAA
AAA
AAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAAAA
AAAA
AAAAA
AAAA
AAAA
AAAA
A
A
A
A
AAAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
A
A
A
A
A
A
AAAAA
F0
C4
DSTi
DSTo
F0o
B1
7
B1
6
B1
5
B1
4
B1
3
B1
2
B1
1
B1
0
B1
7
B1
7
Channel Time 0
B1
7
B1
6
B1
5
B1
4
B1
3
B1
2
B1
1
B1
0
B2
7
B2
6
B2
5
B2
4
B2
3
B2
2
B2
1
B2
0
B2
7
B2
6
B2
5
B2
4
B2
3
B2
2
B2
1
B2
0
Channel Time 16