參數(shù)資料
型號(hào)： MT8950AC
廠商： Mitel Networks Corporation
元件分類： Codec
英文描述： ISO-CMOS ST-BUS⑩ FAMILY Data Codec
中文描述： 異意法半導(dǎo)體的CMOS總線⑩系列數(shù)據(jù)編解碼器
文件頁(yè)數(shù)： 3/16頁(yè)
文件大?。?/td> 223K
代理商： MT8950AC
ISO-CMOS
MT8950
6-5
10
D
X
2
Data Transmit 2 (Schmitt Input)
- If DF = LOW, accepts data pulses which are
encoded only if there is no activity on the D
X
1 pin - the data format and
restrictions on the use of this input is explained in the text.
If DF= HIGH, accepts active low unipolar pulses representing the digital data in the
RZ format. MARK or SPACE polarity is established by the RxE input.
11
NRZo
Non-Return to Zero Output (Open Drain Output) -
The incoming data, in the RZ
format or the NRZ format , is internally converted to inverted NRZ and appears on
this open drain output. This output in conjunction with the SPi input can be used for
long space detection.
12
V
SS
SCLK
Ground (0 Volt).
13
Secondary Clock (TTL Input) -
This is an external clock input that determines the
timing of the Violation Word and the synchronization pulses. If these features are
not to be utilized, this input can be tied to V
SS
.
Drive Point Output (Totem-pole Output) -
This output is exerted high when the
Control Register bits b7, b6 and b5 are set to 110 (decimal 6). The operation of the
Codec is normal in every other respect.
14
DP
15
SPi
Uncommitted Scan Point Input (Voltage Comparator Input )
-
A LOW to HIGH
transition on this input causes SPo to be set LOW. This is used to detect a long
SPACE condition in conjunction with NRZo (pin 11).
16
SPo
Uncommitted Scan Point Output (Totem-pole Output ) -
This output is set LOW
when the SPi input undergoes a LOW to HIGH transition. The SPo is reset by the
presence of a logic "1" in bit b0 of Control Register. This function is active at all
times except when RxE is false and during power reset conditions.
17
DA
Data Activity (Totem-pole Output ) -
The NRZ/RZ input circuitry monitors the
input signal (after polarity is established) and activates this output when it detects a
SPACE on the input. This output is reset by the presence of a logic "1" in bit 1 of the
Control Register. The DA function is active at all times except when RxE is false and
during power reset conditions.
18
D
R
2
Data Receive 2 (Totem-pole Output) -
If DF = LOW ( NRZ format), outputs the
secondary data signal in the NRZ form as explained in the text.
If DF = HIGH (RZ format), outputs unipolar, active high MARK pulses.
19
D
R
1
Data Receive 1 (Totem-pole Output)
- If DF = LOW (NRZ format) , outputs the
NRZ data signal. ( HIGH = MARK, LOW = SPACE)
If DF = HIGH (RZ format), outputs unipolar, active low SPACE pulses.
20
NC
No connection.
21
NC
No connection.
22
PRST
Power Reset (CMOS Schmitt Input ) -
A LOW level on this input evokes the power
reset condition for the codec.
23
NC
No connection.
Positive
Supply Voltage +5 volts ± 10% .
24
V
DD
Pin Description (continued)
Pin #
Name
Description
相關(guān)PDF資料
PDF描述
MT8952BC ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
MT8952BE ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
MT8952BP ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
MT8952BS ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
MT8952 ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT8952 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
MT8952B 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
MT8952B-1 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
MT8952BC 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
MT8952BE 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO-CMOS ST-BUS⑩ FAMILY HDLC Protocol Controller
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