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參數(shù)資料
| 型號(hào)： | MT8940AC |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | T1/CEPT Digital Trunk PLL |
| 中文描述： | T1/CEPT數(shù)字集群鎖相環(huán) |
| 文件頁(yè)數(shù)： | 15/16頁(yè) |
| 文件大?。?/td> | 299K |
| 代理商： | MT8940AC |
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ISO-CMOS
MT8940
3-41
Timing is over recommended temperature & power supply voltages
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
Figure 15 - External Inputs on C4b and F0b for the DPLL #2
Timing is over recommended temperature & power supply voltages
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
Figure 16 - Three State Outputs and Enable Timings
AC Electrical Characteristics
- Voltages are with respect to ground (V
SS
) unless otherwise stated.
(Ref. Figure 15)
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
F0b input pulse width (LOW)
t
WFP
t
P4o
t
FS
t
FH
40
ns
2
C4b input clock period
.080
50
μ
s
3
Frame pulse (F0b) setup time
25
ns
4
Frame pulse (F0b) hold time
5
ns
AC Electrical Characteristics
- Voltages are with respect to ground (V
SS
) unless otherwise stated.
(Ref. Figure 16)
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions
1
O
U
T
P
U
T
Delay from Enable to Output
(HIGH to THREE STATE)
t
PHZ
15
65
ns
Test load circuit 3 (Fig.17)
2
Delay from Enable to Output
(LOW to THREE STATE)
t
PLZ
10
55
ns
Test load circuit 3 (Fig.17)
3
Delay from Enable to Output
(THREE STATE to HIGH)
t
PZH
40
ns
Test load circuit 3 (Fig.17)
4
Delay from Enable to Output
(THREE STATE to LOW)
t
PZL
50
ns
Test load circuit 3 (Fig.17)
F0b
C4b
V
IH
V
IL
V
IH
V
IL
t
FS
t
WFP
t
FH
t
P4o
Enable
Input
Output
LOW to
OFF
Output
HIGH
to OFF
t
f
6 ns
t
6 ns
10%
90%
1.3 V
1.3 V
Outputs
Enabled
Outputs
Enabled
Outputs
Disabled
3.0 V
2.7 V
1.3 V
0.3 V
t
PLZ
t
PHZ
t
PZL
t
PZH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT8940AE | ISO-CMOS ST-BUS⑩ FAMILY T1/CEPT Digital Trunk PLL |
| MT8941B | Advanced T1/CEPT Digital Trunk PLL(先進(jìn)的T1/CEPT數(shù)字中繼鎖相環(huán)) |
| MT8941B | CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL |
| MT8941BE | CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL |
| MT8941BP | CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT8940AE | 制造商:MITEL 功能描述: |
| MT8941 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Advanced T1/CEPT Digital Trunk PLL |
| MT8941AE | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL |
| MT8941AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL |
| MT8941B | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Advanced T1/CEPT Digital Trunk PLL |
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