
Application Note
MSAN-108
A-47
receive and decode DTMF tones. Initial functions
were, commonly, phone number decoders and toll
call restrictors. A DTMF receiver is also frequently
used as a building block in a tone-to-pulse converter
which
allows
Touch-Tone dialling
mechanical step-by-step and crossbar exchanges
(Fig. 2).
access
to
The introduction of MOS/LSI digital techniques
brought about the second generation of tone receiver
development. These devices were used to digitally
decode the two discrete tones that result from
decomposition of the composite signal. Two analog
bandpass filters were used to perform the
decomposition.
Totally self-contained receivers implemented in thick
film hybrid technology depicted the start of third
generation devices. Typically, they also used analog
active filters to bandsplit the composite signal and
MOS digital devices to decode the tones.
The development of silicon-implemented switched
capacitor sampled filters marked the birth of the
fourth and current generation of DTMF receiver
technology. Initially single chip bandpass filters were
combined with currently available decoders enabling
a two chip receiver design. A further advance in
integration has merged both functions onto a single
chip allowing DTMF receivers to be realized in
minimal space at a low cost.
The second and third generation technologies saw a
tendency to shift complexity away from the analog
circuitry towards the digital LSI circuitry in order to
reduce the complexity of analog filters and their
inherent problems. Now that the filters themselves
can be implemented in silicon, the distribution of
complexity becomes more a function of performance
and silicon real estate.
Inside The MT8870
The MT8870 is a state of the art single chip DTMF
receiver incorporating switched capacitor filter
technology and an advanced digital counting/
averaging algorithm for period measurement. The
block diagram (Fig. 3) illustrates the internal
workings of this device.
To aid design flexibility, the DTMF input signal is
first buffered by an input op-amp which allows
adjustment of gain and choice of input configuration.
The input stage is followed by a low pass continuous
RC active filter which performs an antialiasing
function. Dial tone at 350 and 440Hz is then rejected
by a third order switched capacitor notch filter. The
signal, still in its composite form, is then split into its
individual high and low frequency components by
two sixth order switched capacitor and pass filters.
Each component tone is then smoothed by an output
filter and squared up by a hard limiting comparator.
The two resulting rectangular waves are applied to
digital circuitry where a counting algorithm measures
and averages their periods. An accurate reference
clock is derived from an inexpensive external
3.58MHz colourburst crystal.
The timing diagram (Fig. 4) illustrates the sequence
of events which follow digital detection of a DTMF
tone pair. Upon recognition of a valid frequency from
each tone group the Early Steering (ESt) output is
raised. The time required to detect the presence of
two valid tones, t
DP
, is a function of the decode
algorithm, the tone frequency and the previous state
of the decode logic. ESt indicates that two tones of
proper frequency have been detected and initiates
an RC timing circuit. If both tones are present for the
minimum guard time, t
GTP
, which is determined by
the external RC network, the DTMF signal is
decoded and the resulting data (Table 1) is latched in
the output register. The Delayed Steering (StD)
output is raised and indicates that new data is
available. The time required to receive a valid DTMF
signal, t
REC
, is equal to the sum of t
DP
andt
GTP
.
Table 1. MT8870 Output Truth Table
0=LOGIC LOW 1=LOGIC HIGH Z=HIGH IMPEDANCE
Output truth table. Note that key "0" is output as "1010
2
(ie:10
10)
" corresponding to standard telephony coding.
A simplified circuit diagram (Fig. 5) illustrates how
the chip’s steering circuit drives the external RC
network to generate guard times. Pin 17, St/GT
(Steering/Guard Time), is a bidirectional signal pin
which controls StD, the output latches, and resets
the timing circuit. When St/GT is in its input mode
(St function) both Q
1
and Q
2
are turned off and the
voltage level at St/GT is compared to the steering
threshold voltage V
TSt
.
A transition from below to
above V
TSt
will switch the comparator’s output from
f
LOW
697
697
697
770
770
770
852
852
852
941
941
941
697
770
852
941
-
f
HIGH
1209
1336
1477
1209
1336
1477
1209
1336
1477
1209
1336
1477
1633
1633
1633
1633
-
KEY
TOE
Q
4
Q
3
Q
2
Q
1
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
0
0
Z
Z
1
2
3
4
5
6
7
8
9
0
*
#
A
B
C
D
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
Z
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Z
ANY