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參數(shù)資料
| 型號(hào)： | MT58L32L32D |
| 廠商： | Micron Technology, Inc. |
| 英文描述： | 32K x 32,3.3V I/O, Pipelined, DCD SyncBurst SRAM(1Mb,3.3V輸入/輸出，流水線式，雙循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器) |
| 中文描述： | 32KX8的32,3.3六/ O的流水線，雙氰胺SyncBurst的SRAM（1兆，3.3V的輸入/輸出，流水線式，雙循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器） |
| 文件頁數(shù)： | 14/17頁 |
| 文件大?。?/td> | 326K |
| 代理商： | MT58L32L32D |
1Mb: 64K x 18, 32K x 32/36 3.3V I/O, Pipelined, DCD SyncBurst SRAM
MT58L64L18D.p65 – Rev. 9/99
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1999, Micron Technology, Inc.
14
1Mb: 64K x 18, 32K x 32/36
3.3V I/O, PIPELINED, DCD SYNCBURST SRAM
READ TIMING
tKC
tKL
CLK
ADSP#
tADSH
tADSS
ADDRESS
tKH
OE#
ADSC#
CE#
(NOTE 2)
tAH
tAS
A1
tCEH
tCES
GW#, BWE#,
BWa#-BWd#
Q
High-Z
tKQLZ
tKQX
tKQ
ADV#
tOEHZ
tKQ
Single READ
BURST READ
tOEQ
tOELZ
tKQHZ
Burst wraps around
to its initial state.
tAAH
tAAS
tWH
tWS
tADSH
tADSS
Q(A2)
Q(A2 + 1)
Q(A2 + 2)
Q(A1)
Q(A2)
Q(A2 + 1)
Q(A3)
Q(A2 + 3)
A2
A3
(NOTE 1)
Deselect
cycle.
(NOTE 3)
Burst continued with
new base address.
(NOTE 4)
ADV# suspends burst.
DON’T CARE
UNDEFINED
NOTE:
1. Q(A2) refers to output from address A2. Q(A2 + 1) refers to output from the next internal burst address following A2.
2. CE2# and CE2 have timing identical to CE#. On this diagram, when CE# is LOW, CE2# is LOW and CE2 is HIGH. When
CE# is HIGH, CE2# is HIGH and CE2 is LOW.
3. Timing is shown assuming that the device was not enabled before entering into this sequence. OE# does not cause Q
to be driven until after the following clock rising edge.
4. Outputs are disabled within two clock cycles after deselect.
-6
-7.5
-10
SYM
t
AS
t
ADSS
t
AAS
t
WS
t
CES
t
AH
t
ADSH
t
AAH
t
WH
t
CEH
MIN
1.7
1.7
1.7
1.7
1.7
0.5
0.5
0.5
0.5
0.5
MAX
MIN
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
MAX
MIN
2.2
2.2
2.2
2.2
2.2
0.5
0.5
0.5
0.5
0.5
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ TIMING PARAMETERS
-6
-7.5
-10
SYM
t
KC
f
KF
t
KH
t
KL
t
KQ
t
KQX
t
KQLZ
t
KQHZ
t
OEQ
t
OELZ
t
OEHZ
MIN
6.0
MAX
MIN
7.5
MAX
MIN
10
MAX
UNITS
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
166
133
100
1.7
1.7
1.9
1.9
3.2
3.2
3.5
4.2
5.0
1.5
1.5
1.5
1.5
1.5
1.5
3.5
3.5
4.2
4.2
5.0
5.0
0
0
0
3.5
4.2
4.5
相關(guān)PDF資料 |
PDF描述 |
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| MT58L32L36D | 32K x 36,3.3V I/O, Pipelined, DCD SyncBurst SRAM(1Mb,3.3V輸入/輸出，流水線式，雙循環(huán)取消選擇，同步脈沖靜態(tài)存儲(chǔ)器) |
| MT58L512Y32D | 16Mb SYNCBURST⑩ SRAM |
| MT58L64L18F | 64K x 18, 3.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V輸入/輸出,流通式同步脈沖靜態(tài)RAM) |
| MT58L32L32F | 32K x 32， 3.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V輸入/輸出,流通式同步脈沖靜態(tài)RAM) |
| MT58L32L36F | 32K x 36， 3.3V I/O, Flow-Through SyncBurst SRAM(1Mb,3.3V輸入/輸出，流通式同步脈沖靜態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT58L32L32DT-10 | 制造商:Cypress Semiconductor 功能描述:32KX32 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT58L32L32DT-6 | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Quad 3.3V 1M-Bit 32K x 32 3.5ns 100-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT58L32L32DT-7.5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT58L32L32FT-10 | 制造商:Cypress Semiconductor 功能描述:32KX32 SRAM PLASTIC TQFP 3.3V 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT58L32L32FT-10 TR | 制造商:Cypress Semiconductor 功能描述:32KX32 SRAM PLASTIC TQFP 3.3V |
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