參數(shù)資料
型號(hào): MT55L128V32P1
廠商: Micron Technology, Inc.
英文描述: 2.5V I/O,128K x 32,F(xiàn)low-Through ZBT SRAM(2.5V輸入/輸出,4Mb流通式同步靜態(tài)存儲(chǔ)器)
中文描述: 2.5VI / O的128K的× 32,流量通過(guò)ZBT SRAM的電壓(2.5V輸入/輸出,4Mb的流通式同步靜態(tài)存儲(chǔ)器)
文件頁(yè)數(shù): 17/25頁(yè)
文件大?。?/td> 434K
代理商: MT55L128V32P1
17
4Mb: 256K x 18, 128K x 32/36 Pipelined ZBT SRAM
MT55L256L18P1_2.p65
Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
PRELIMINARY
4Mb: 256K x 18, 128K x 32/36
PIPELINED ZBT SRAM
I
DD
OPERATING CONDITIONS AND MAXIMUM LIMITS
(Note 1) (0
°
C
T
A
+70
°
C; V
DD
= +3.3V ±0.165V unless otherwise noted)
DESCRIPTION
Power Supply
Current:
Operating
Power Supply
Current: Idle
CONDITIONS
SYMBOL
TYP
-6
-7.5
-10
UNITS NOTES
Device selected; All inputs
V
IL
or
V
IH
; Cycle time
t
KC (MIN);
V
DD
= MAX; Outputs open
Device selected; V
DD
= MAX;
CKE#
V
IH
;
All inputs
V
SS
+ 0.2 or
V
DD
- 0.2;
Cycle time
t
KC (MIN)
Device deselected; V
DD
= MAX;
All inputs
V
SS
+ 0.2 or
V
DD
- 0.2;
All inputs static; CLK frequency = 0
Device deselected; V
DD
= MAX;
All inputs
V
IL
or
V
IH
;
All inputs static; CLK frequency = 0
Device deselected; V
DD
= MAX;
ADV/LD#
V
IH
; All inputs
V
SS
+ 0.2
or
V
DD
- 0.2; Cycle time
t
KC (MIN)
ZZ
V
IH
I
DD
200
500
400
300
mA
2, 3, 4
I
DD
1
10
25
25
20
mA
2, 3, 4
CMOS Standby
I
SB
2
0.5
10
10
10
mA
3, 4
TTL Standby
I
SB
3
6
25
25
25
mA
3, 4
Clock Running
I
SB
4
45
120
75
60
mA
3, 4
SNOOZE MODE
I
SB
2
Z
0.5
10
10
10
mA
4
MAX
NOTE:
1. V
DD
Q = +3.3V ±0.165V for 3.3V I/O configuration; V
DD
Q = +2.5V +0.4V/-0.125V for 2.5V I/O
configuration.
2. I
DD
is specified with no output current and increases with faster cycle times. I
DD
Q increases with faster cycle times and
greater output loading.
3.
Device deselected
means device is in a deselected cycle as defined in the truth table.
Device selected
means device
is active (not in deselected mode).
4. Typical values are measured at 3.3V, 25
°
C and 10ns cycle time.
5. This parameter is sampled.
6. Preliminary package data.
TQFP THERMAL RESISTANCE
DESCRIPTION
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Top of Case)
CONDITIONS
SYMBOL
θ
JA
TYP
46
UNITS NOTES
°
C/W
Test conditions follow standard test methods
and procedures for measuring thermal
impedance, per EIA/JESD51.
5
θ
JC
2.8
°
C/W
5
FBGA THERMAL RESISTANCE
DESCRIPTION
Junction to Ambient
(Airflow of 1m/s)
CONDITIONS
SYMBOL
θ
JA
TYP
40
UNITS NOTES
°
C/W
Test conditions follow standard test methods
and procedures for measuring thermal
impedance, per EIA/JESD51.
5, 6
Junction to Case (Top)
Junction to Pins
(Bottom)
θ
JC
θ
JB
9
17
°
C/W
°
C/W
5, 6
5, 6
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