參數(shù)資料
型號： MT4C4M4A1TG-6
廠商： Micron Technology, Inc.
英文描述： DRAM
中文描述： 內(nèi)存
文件頁數(shù)： 6/20頁
文件大小： 360K
代理商： MT4C4M4A1TG-6
6
4 Meg x 4 FPM DRAM
D49_5V.p65 – Rev. 5/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
4 MEG x 4
FPM DRAM
AC ELECTRICAL CHARACTERISTICS
(Notes: 5, 6, 7, 8, 9, 10, 11, 12) [Vcc (MIN)
￡
Vcc
￡
Vcc (MAX)]
AC CHARACTERISTICS
PARAMETER
Access time from column address
Column-address hold time (referenced to RAS#)
Column-address setup time
Row-address setup time
Column address to WE# delay time
Access time from CAS#
Column-address hold time
CAS# pulse width
CAS# LOW to “Don’t Care” during Self Refresh
CAS# hold time (CBR Refresh)
CAS# to output in Low-Z
CAS# precharge time
Access time from CAS# precharge
CAS# to RAS# precharge time
CAS# hold time
CAS# setup time (CBR Refresh)
CAS# to WE# delay time
WRITE command to CAS# lead time
Data-in hold time
Data-in setup time
Output disable
Output enable
OE# hold time from WE# during
READ-MODIFY-WRITE cycle
Output buffer turn-off delay
OE# setup prior to RAS# during HIDDEN REFRESH cycle
FAST-PAGE-MODE READ or WRITE cycle time
FAST-PAGE-MODE READ-WRITE cycle time
Access time from RAS#
RAS# to column-address delay time
Row-address hold time
RAS# pulse width
RAS# pulse width (FAST PAGE MODE)
RAS# pulse width during Self Refresh
Random READ or WRITE cycle time
RAS# to CAS# delay time
READ command hold time (referenced to CAS#)
READ command setup time
Refresh period (2,048 cycles)
Refresh period (4,096 cycles)
-5
-6
SYMBOL
t
AA
t
AR
t
ASC
t
ASR
t
AWD
t
CAC
t
CAH
t
CAS
t
CHD
t
CHR
t
CLZ
t
CP
t
CPA
t
CRP
t
CSH
t
CSR
t
CWD
t
CWL
t
DH
t
DS
t
OD
t
OE
t
OEH
MIN
MAX
25
MIN
MAX
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
38
0
0
42
45
0
0
49
18
13
15
8
8
15
8
0
8
10
10
15
10
0
10
10,000
10,000
4
22
13
28
35
5
38
5
28
8
8
0
0
5
45
5
35
10
10
0
0
4
18
19
19
22
20
12
12
15
15
8
10
t
OFF
t
ORD
t
PC
t
PRWC
t
RAC
t
RAD
t
RAH
t
RAS
t
RASP
t
RASS
t
RC
t
RCD
t
RCH
t
RCS
t
REF
t
REF
0
0
20
47
12
0
0
25
56
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ms
ms
17, 22
50
60
9
9
50
50
100
84
11
0
0
12
10
60
60
100
104
14
0
0
15
10,000
125,000
10,000
125,000
14
16
32
64
32
64
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