參數(shù)資料
型號(hào)： MT48LC32M8A2
廠商： Micron Technology, Inc.
英文描述： SYNCHRONOUS DRAM
中文描述： 同步DRAM
文件頁(yè)數(shù)： 50/62頁(yè)
文件大?。?/td> 1517K
代理商： MT48LC32M8A2
50
256Mb: x4, x8, x16 SDRAM
256MSDRAM_E.p65
–
Rev. E; Pub. 3/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
256Mb: x4, x8, x16
SDRAM
READ – FULL-PAGE BURST
1
tCH
tCL
tCK
tAC
tLZ
tRCD
CAS Latency
DQM/
DQML, DQMU
CKE
CLK
A0-A9, A11, A12
DQ
BA0, BA1
A10
tOH
D
OUT
m
tCMH
tCMS
tAH
tAS
tAH
tAS
tAC
tOH
D
OUT
m
+1
ROW
ROW
tHZ
tAC
tOH
D
OUT
m
+1
tAC
tOH
D
OUT
m
+2
tAC
tOH
D
OUT
m
-1
tAC
tOH
Dout
m
Full-page burst does not self-terminate.
Can use BURST TERMINATE command.
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Full page completed
512 (x16) locations within same row
1,024 (x8) locations within same row
2,048 (x4) locations within same row
DON
’
T CARE
UNDEFINED
COMMAND
tCMH
tCMS
NOP
NOP
NOP
ACTIVE
NOP
READ
NOP
BURST TERM
NOP
NOP
(
)
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(
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NOP
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(
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tAH
tAS
BANK
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BANK
tCKH
tCKS
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COLUMN
m
2
3
T0
T1
T2
T4
T3
T5
T6
Tn + 1
Tn + 2
Tn + 3
Tn + 4
NOTE:
1. For this example, the CAS latency = 2.
2. x16: A9, A11, and A12 =
“
Don
’
t Care
”
x8: A11 and A12 =
“
Don
’
t Care
”
x4: A12 =
“
Don
’
t Care
”
3. Page left open; no
t
RP.
*CAS latency indicated in parentheses.
-7E
-75
SYMBOL*
t
CKS
t
CMH
t
CMS
t
HZ (3)
t
HZ (2)
t
LZ
t
OH
t
RCD
MIN
1.5
0.8
1.5
MAX
MIN
1.5
0.8
1.5
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
5.4
5.4
5.4
6
1
3
15
1
3
20
TIMING PARAMETERS
-7E
-75
SYMBOL*
t
AC (3)
t
AC (2)
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CKH
MIN
MAX
5.4
5.4
MIN
MAX
5.4
6
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
0.8
1.5
2.5
2.5
7
7.5
0.8
0.8
1.5
2.5
2.5
7.5
10
0.8
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