- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359228 > MT352GP1N (Zarlink Semiconductor Inc.) COFDM Demodulator PDF資料下載
參數(shù)資料
| 型號： | MT352GP1N |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | COFDM Demodulator |
| 中文描述： | COFDM解調(diào)器 |
| 文件頁數(shù)： | 15/24頁 |
| 文件大小： | 478K |
| 代理商： | MT352GP1N |
MT352
Data Sheet
15
Zarlink Semiconductor Inc.
Note 1. The rise time depends on the external bus pull up resistor. Loading prevents full speed operation.
3.3 MPEG
3.3.1 Data Output Header Format
Figure 7 - DVB Transport Packet Header Byte
Parameter
Symbol
Value
Unit
Min.
Max.
CLK clock frequency (Primary)
f
CLK
t
BUFF
t
HD;STA
t
LOW
t
HIGH
t
SU;STA
t
HD;DAT
t
SU;DAT
t
R
t
F
t
SU;STO
0
450
kHz
Bus free time between a STOP and START condition
200
ns
Hold time (repeated) START condition
200
ns
LOW period of CLK clock
1300
ns
HIGH period of CLK clock
600
ns
Set-up time for a repeated START condition
200
ns
Data hold time (when input)
100
ns
Data set-up time
100
ns
Rise time of both CLK and DATA signal.
note 1
ns
Fall time of both CLK and DATA signals, (100 pF to ground)
20
ns
Set-up time for a STOP condition
200
ns
Table 2 - Timing of 2-Wire Bus
相關PDF資料 |
PDF描述 |
|---|---|
| MT3530 | BELL 103/V.21 SINGLE CHIP MODEM |
| MT3530BE | BELL 103/V.21 SINGLE CHIP MODEM |
| MT3LST3264G-11 | x64 Interleaved Burst Mode SRAM Module |
| MT3LST3264G-12 | x64 Interleaved Burst Mode SRAM Module |
| MT3LST3264G-9 | x64 Interleaved Burst Mode SRAM Module |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MT3530 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:BELL 103/V.21 SINGLE CHIP MODEM |
| MT3530BE | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:BELL 103/V.21 SINGLE CHIP MODEM |
| MT3560A-UHR2 | 制造商:MARKTECH 制造商全稱:Marktech Corporate 功能描述:Red Visible Emitter |
| MT35-H | 制造商:Tamura Corporation of America 功能描述: |
| MT35-M | 制造商:Tamura Corporation of America 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。