參數(shù)資料
型號: MSM6636JS
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 41.6K bps, LOCAL AREA NETWORK CONTROLLER, PQCC18
封裝: 0.290 INCH, 1.27 MM PITCH, PLASTIC, QFJ-18
文件頁數(shù): 27/72頁
文件大?。?/td> 707K
代理商: MSM6636JS
MSM6636/6636B User’s Manual
CPU Interfaces
4 – 6
[READ PROCEDURE]
Send the address of the read target register and the read communication type set value “10”. The MSM6636
automatically sends the specified read target data after a specified time.*1 The address auto-increment function
does not operate when reading in UART mode. When reading from the MSM6636, address setting is required
for each data item.
1.
Set “1” to the A-D pin to send the read destination address and the communication type.
2.
Send start bit “0” and 8 bits of register read code M1, M0 = “1, 0”, and read destination responder address
values “A5 to A0” to RXD input with LSB first. When sending, add even parity (when parity yes is
selected) and stop bit “1” after the MSB bit.
3.
After detecting the edge of start bit “0”, the MSM6636 generates a shift clock synchronizing data and
samples data in the sequence of input to RXD.
4.
Read target data is sent from TXD output in the sequence of start bit, 8 bits of read data (LSB first), parity
bit and stop bit, after a specified time.*1 Receive in UART at the CPU side with the same baud rate.
*1: The interval time from when the read request in UART came from the CPU to when data transmit starts
takes 56 clocks of source oscillation.
[COMMUNICATION TYPE AND COMMUNICATION ADDRESS]
M1
7
M0
6
A5
5
A4
4
A3
3
A2
2
A1
1
A0
0
High-order 2 bits (communication type)
Low-order 6 bits (communication address)
01: WR Register
Write destination address
10: RD Register
Read destination address
RXD
(TXD)
D0
D1
D2
D5
D6
D7
P
A-D
START
STOP
P: Even parity
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