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參數(shù)資料
| 型號(hào)： | MSM64172-XXX |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 0.6 MHz, MICROCONTROLLER, UUC |
| 封裝： | DIE |
| 文件頁數(shù)： | 18/30頁 |
| 文件大?。?/td> | 239K |
| 代理商： | MSM64172-XXX |
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Semiconductor
MSM64172
FUNCTIONAL DESCRIPTION
CPU Peripheral Functions
Serial port (SIOP)
The MSM64172 has an 8-bit synchronous serial port. Receive/transmit operation of the serial
port is performed simultaneously and the serial transfer clock can select either internal or
external mode. Direction of transfer data can be big endian or little endian. Each pin of the serial
port is assigned as secondary functions of P1.3 and P2.0 to P2.2. Setting each bit of SIN, SOUT,
SPR, and SCLK of P13CON and P20CON to P22CON to "1" makes each pin valid.
LCD driver (LCD)
The MSM64172 has a built-in LCD driver for 27 outputs.
The LCD driver consists of display registers (DSPR0-30), the Display Control Register (DSPCON),
a 27-output LCD driver circuit, and a bias generation circuit (BIAS).
There are three types of driving methods: 1/4 duty, 1/3 duty, and 1/2 duty. Software selects
the duty mode.
S0 to S15 of the LCD driver can be configured to be output ports by a mask option.
The relationship between the duty, the bias method, and the maximum segment number follows:
1/4 duty 1/3 bias method ------- 92 segments (COM0-3, S0-22)
1/3 duty 1/3 bias method ------- 72 segments (COM0-2, S0-23)
1/2 duty 1/2 bias method ------- 50 segments (COM0, 1, S0-24)
Buzzer driver (BD)
The MSM64172 has a built-in buzzer driver with 2 buzzer output frequencies and 4 buzzer output
modes. Each buzzer output is selected by the Buzzer Control Register (BDCON) and the Buzzer
Frequency Control Register (BFCON).
Watchdog timer (WDT)
The MSM64172 has a built-in watchdog timer to detect CPU malfunction. The watchdog timer
is composed of a 6-bit watchdog timer counter (WDTC) to count a 16 Hz output and a watchdog
timer control register (WDTCON) to reset WDTC.
Clock generation circuit (2CLK)
The Clock Generation Circuit (2CLK) consists of a 32.768 kHz crystal oscillation circuit, a high-
speed clock generation circuit, and clock control logic. 2CLK generates the system clock (CLK)
and the time-base clock (32.768 kHz).
The high-speed clock generation circuit is available only for use in 3 V operation, and offers two
modes, the RC Oscillation Mode and the Ceramic Resonator Oscillation Mode.
The system clock is the source clock for the CPU. The time-base clock is the source clock for the
TBC and BD.
The system clock frequency is 32.768 kHz, which is output from the crystal oscillation circuit in
1.5 V operation. In 3.0 V operation, the system clock can be switched to 32.768 kHz, which is
output from the crystal oscillation circuit, or to the frequency that is output from the high-speed
clock oscillation circuit by controlling the contents of Frequency Control Register (FCON). The
desired high-speed clock oscillation circuit mode also can be selected by using FCON.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| MSM6422 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:High speed and Simple 4-Bit Microcontroller |
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| MSM64422 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Built-in 256/512-Bit EEPROM and LCD Driver 4-Bit Microcontroller |
| MSM64422-XXXMS-K | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Built-in 256/512-Bit EEPROM and LCD Driver 4-Bit Microcontroller |
| MSM64424 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Built-in 256/512-Bit EEPROM and LCD Driver 4-Bit Microcontroller |
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