參數(shù)資料
型號: MSM6222B-XXGS-L
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 顯示控制器
英文描述: 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 21/45頁
文件大?。?/td> 391K
代理商: MSM6222B-XXGS-L
MSM6222B-xx
Semiconductor
28/45
L
R/W
Instruction code
L
RS
L
DB7
L
DB6
L
DB5
L
DB4
L
DB3
L
DB2
L
DB1
H
DB0
Instruction Code
The instruction code is defined as the signal through which the MSM6222B-xx is accessed
by the CPU.
The MSM6222B-xx begins operation upon receipt of the instruction code input.
As the internal processing operation of MSM6222B-xx starts in a timing that does not affect
the LCD display, the busy status continues for longer than the CPU cycle time.
Under the busy status (when the busy flag is set to "H"), the MSM6222B-xx does not execute
any instructions other than the busy flag read.
Therefore, the CPU has to verify that the busy flag is set to "L" prior to the input of the
instruction code.
(1) Display clear:
When this instruction is executed, the LCD display is cleared.
I/D in the entry mode setting is set to "H" (increment). SH does not change.
When the cursor and blink are in display, the blinking position moves to the left end of the
LCD (the left end of the first line in the 2-line display mode).
(Note) All DD RAM data goes to "20" (hex.), while the address counter (ADC) goes to "00"
(hex.). The execution time is 1.64 ms (max.), when the OSC oscillation frequency
is 250 kHz.
(2) Cursor home
When this instruction is executed, the blinking position moves to the left end of the LCD
(to the left end of the first line in the 2-line display mode) as the cursor and blink are being
displayed.
When the display is in shift, the display returns to its original position before shifting.
(Note) The address counter (ADC) goes to "00" (hex.). The execution time is 1.64 ms
(max.), when the OSC oscillation frequency is 250 kHz.
L
R/W
Instruction code
L
RS
L
DB7
L
DB6
L
DB5
L
DB4
L
DB3
L
DB2
H
DB1
X
DB0
X : Don't Care
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