MSC8101 Technical Data, Rev. 16
ii
Freescale Semiconductor
Table of Contents
MSC8101 Features .................................................................................................................................................................................... iii
Target Applications.....................................................................................................................................................................................iv
Product Documentation ..............................................................................................................................................................................iv
Signals/Connections
1.1
Power Signals ........................................................................................................................................................................ 1-4
1.2
Clock Signals......................................................................................................................................................................... 1-4
1.3
Reset, Configuration, and EOnCE Event Signals.................................................................................................................. 1-5
1.4
System Bus, HDI16, and Interrupt Signals............................................................................................................................ 1-6
1.5
Memory Controller Signals .................................................................................................................................................1-13
1.6
CPM Ports............................................................................................................................................................................1-15
1.7
JTAG Test Access Port Signals............................................................................................................................................ 1-36
1.8
Reserved Signals.................................................................................................................................................................. 1-36
Physical and Electrical Specifications
2.1
Absolute Maximum Ratings.................................................................................................................................................. 2-1
2.2
Recommended Operating Conditions.................................................................................................................................... 2-2
2.3
Thermal Characteristics......................................................................................................................................................... 2-2
2.4
DC Electrical Characteristics................................................................................................................................................. 2-3
2.5
Clock Configuration .............................................................................................................................................................. 2-4
2.6
AC Timings............................................................................................................................................................................ 2-7
Packaging
3.1
FC-PBGA Package Description............................................................................................................................................. 3-1
3.2
Lidded FC-PBGA Package Mechanical Drawing...............................................................................................................3-31
Design Considerations
4.1
Thermal Design Considerations............................................................................................................................................. 4-1
4.2
Electrical Design Considerations........................................................................................................................................... 4-1
4.3
Power Considerations............................................................................................................................................................ 4-2
4.4
Layout Practices..................................................................................................................................................................... 4-3
Chapter 1
Chapter 2
Chapter 3
Chapter 4
Ordering and Contact Information...............................................................................................................................Back Cover
Data Sheet Conventions
pin and pin-
out
OVERBAR
Although the device package does not have pins, the term pins and pin-out are used for
convenience and indicate specific signal locations within the ball-grid array.
Used to indicate a signal that is active when pulled low (For example, the
RESET
pin is active
when low.)
Means that a high true (active high) signal is high or that a low true (active low) signal is low
Means that a high true (active high) signal is low or that a low true (active low) signal is high
Signal/Symbol
Logic State
PIN
True
PIN
False
PIN
True
PIN
False
Values for V
IL
, V
OL
, V
IH
, and V
OH
are defined by individual product specifications.
“asserted”
“deasserted”
Examples:
Signal State
Asserted
Deasserted
Asserted
Deasserted
Voltage
V
IL
/V
OL
V
IH
/V
OH
V
IH
/V
OH
V
IL
/V
OL
Note: