參數(shù)資料
型號： MR83C154XXX-16P883
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQCC44
封裝： LCC-44
文件頁數(shù)： 52/142頁
文件大?。?/td> 61013K
代理商： MR83C154XXX-16P883
17
XMEGA B3 [DATASHEET]
8074D–AVR–08/2013
8.
DMAC – Direct Memory Access Controller
8.1
Features
Allows high speed data transfers with minimal CPU intervention
from data memory to data memory
from data memory to peripheral
from peripheral to data memory
from peripheral to peripheral
Two DMA channels with separate
transfer triggers
interrupt vectors
addressing modes
Programmable channel priority
From 1 byte to 16MB of data in a single transaction
Up to 64KB block transfers with repeat
1, 2, 4, or 8 byte burst transfers
Multiple addressing modes
Static
Incremental
Decremental
Optional reload of source and destination addresses at the end of each
Burst
Block
Transaction
Optional interrupt on end of transaction
Optional connection to CRC generator for CRC on DMA data
8.2
Overview
The two-channel direct memory access (DMA) controller can transfer data between memories and peripherals, and thus
offload these tasks from the CPU. It enables high data transfer rates with minimum CPU intervention, and frees up CPU
time. The four DMA channels enable up to four independent and parallel transfers.
The DMA controller can move data between SRAM and peripherals, between SRAM locations and directly between
peripheral registers. With access to all peripherals, the DMA controller can handle automatic transfer of data to/from
communication modules. The DMA controller can also read from memory mapped EEPROM.
Data transfers are done in continuous bursts of 1, 2, 4, or 8 bytes. They build block transfers of configurable size from 1
byte to 64KB. A repeat counter can be used to repeat each block transfer for single transactions up to 16MB. Source and
destination addressing can be static, incremental or decremental. Automatic reload of source and/or destination
addresses can be done after each burst or block transfer, or when a transaction is complete. Application software,
peripherals, and events can trigger DMA transfers.
The two DMA channels have individual configuration and control settings. This include source, destination, transfer
triggers, and transaction sizes. They have individual interrupt settings. Interrupt requests can be generated when a
transaction is complete or when the DMA controller detects an error on a DMA channel.
To allow for continuous transfers, the channels can be interlinked so that the second takes over the transfer when the
first is finished, and vice versa.
相關(guān)PDF資料
PDF描述
MQ83C154CXXX-16P883 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44
MD83C154XXX-20P883D 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40
MR80C154-25P883D 8-BIT, 25 MHz, MICROCONTROLLER, CQCC44
MQ83C154XXX-36/883R 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44
MQ80C154-20P883 8-BIT, 20 MHz, MICROCONTROLLER, CQFP44
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MR850 功能描述:整流器 3.0 Amp 50 Volt 150ns RoHS:否 制造商:Vishay Semiconductors 產(chǎn)品:Standard Recovery Rectifiers 配置: 反向電壓:100 V 正向電壓下降: 恢復(fù)時(shí)間:1.2 us 正向連續(xù)電流:2 A 最大浪涌電流:35 A 反向電流 IR:5 uA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DO-221AC 封裝:Reel
MR850 _AY _10001 制造商:PanJit Touch Screens 功能描述:
MR850 R0 制造商:SKMI/Taiwan 功能描述:Diode Switching 50V 3A 2-Pin DO-201AD T/R
MR850_ R2 _10001 制造商:PanJit Touch Screens 功能描述:
MR850_09 制造商:PANJIT 制造商全稱:Pan Jit International Inc. 功能描述:SOFT RECOVERY, FAST SWITCHING PLASTIC RECTIFIER
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*