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6384E–ATARM–05-Feb-10
AT91SAM9G20
20.4.2
Connection Examples
Figure 20-2 shows an example of connections between the EBI and external devices.
Figure 20-2. EBI Connections to Memory Devices
20.5
Product Dependencies
20.5.1
I/O Lines
The pins used for interfacing the External Bus Interface may be multiplexed with the PIO lines.
The programmer must first program the PIO controller to assign the External Bus Interface pins
to their peripheral function. If I/O lines of the External Bus Interface are not used by the applica-
tion, they can be used for other purposes by the PIO Controller.
20.6
Functional Description
The EBI transfers data between the internal AHB Bus (handled by the Bus Matrix) and the exter-
nal memories or peripheral devices. It controls the waveforms and the parameters of the
external address, data and control buses and is composed of the following elements:
the Static Memory Controller (SMC)
the SDRAM Controller (SDRAMC)
EBI
D0-D31
A2-A15
RAS
CAS
SDCK
SDCKE
SDWE
A0/NBS0
2M x 8
SDRAM
D0-D7
A0-A9, A11
RAS
CAS
CLK
CKE
WE
DQM
CS
BA0
BA1
NWR1/NBS1
A1/NWR2/NBS2
NWR3/NBS3
NCS1/SDCS
D0-D7
D8-D15
A16/BA0
A17/BA1
A18-A25
A10
SDA10
A2-A11, A13
NCS0
NCS2
NCS3
NCS4
NCS5
A16/BA0
A17/BA1
2M x 8
SDRAM
D0-D7
A0-A9, A11
RAS
CAS
CLK
CKE
WE
DQM
CS
BA0
BA1
A10
SDA10
A2-A11, A13
A16/BA0
A17/BA1
2M x 8
SDRAM
D0-D7
A0-A9, A11
RAS
CAS
CLK
CKE
WE
DQM
CS
BA0
BA1
D16-D23
D24-D31
A10
SDA10
A2-A11, A13
A16/BA0
A17/BA1
2M x 8
SDRAM
D0-D7
A0-A9, A11
RAS
CAS
CLK
CKE
WE
DQM
CS
BA0
BA1
A10
SDA10
A2-A11, A13
A16/BA0
A17/BA1
NBS0
NBS1
NBS3
NBS2
NRD/NOE
NWR0/NWE
128K x 8
SRAM
128K x 8
SRAM
D0-D7
A0-A16
A1-A17
CS
OE
WE
D0-D7
D8-D15
OE
WE
NRD/NOE
A0/NWR0/NBS0
NRD/NOE
NWR1/NBS1
SDWE