
80
ATtiny25/45/85 [DATASHEET]
2586Q–AVR–08/2013
The FOC0B bit is always read as zero.
Bits 5:4 – Res: Reserved Bits
These bits are reserved bits in the ATtiny25/45/85 and will always read as zero.
Bit 3 – WGM02: Waveform Generation Mode
Bits 2:0 – CS0[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the counter even if the
pin is configured as an output. This feature allows software control of the counting.
11.9.4
TCNT0 – Timer/Counter Register
The Timer/Counter Register gives direct access, both for read and write operations, to the Timer/Counter unit 8-bit
counter. Writing to the TCNT0 Register blocks (removes) the Compare Match on the following timer clock. Modify-
ing the counter (TCNT0) while the counter is running, introduces a risk of missing a Compare Match between
TCNT0 and the OCR0x Registers.
11.9.5
OCR0A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the counter value
(TCNT0). A match can be used to generate an Output Compare interrupt, or to generate a waveform output on the
OC0A pin.
Table 11-6.
Clock Select Bit Description
CS02
CS01
CS00
Description
0
No clock source (Timer/Counter stopped)
00
1
clkI/O/(No prescaling)
01
0
clkI/O/8 (From prescaler)
01
1
clkI/O/64 (From prescaler)
10
0
clkI/O/256 (From prescaler)
10
1
clkI/O/1024 (From prescaler)
1
0
External clock source on T0 pin. Clock on falling edge.
1
External clock source on T0 pin. Clock on rising edge.
Bit
7
654321
0
TCNT0[7:0]
TCNT0
Read/Write
R/W
Initial Value
0
000000
0
Bit
7
654321
0
OCR0A[7:0]
OCR0A
Read/Write
R/W
Initial Value
0
000000
0