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參數(shù)資料
| 型號： | MQ80C154-36/883D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 36 MHz, MICROCONTROLLER, CQFP44 |
| 封裝： | CERAMIC, QFP-44 |
| 文件頁數(shù)： | 133/134頁 |
| 文件大?。?/td> | 3805K |
| 代理商： | MQ80C154-36/883D |
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98
8068U–AVR–06/2013
XMEGA A3
Not recommended for new designs -
Use XMEGA A3U series
22. TWI Transmit collision flag not cleared on repeated start
The TWI transmit collision flag should be automatically cleared on start and repeated start,
but is only cleared on start.
Problem fix/Workaround
Clear the flag in software after address interrupt.
23. Clearing TWI Stop Interrupt Flag may lock the bus
If software clears the STOP Interrupt Flag (APIF) on the same Peripheral Clock cycle as the
hardware sets this flag due to a new address received, CLKHOLD is not cleared and the
SCL line is not released. This will lock the bus.
Problem fix/Workaround
Check if the bus state is IDLE. If this is the case, it is safe to clear APIF. If the bus state is
not IDLE, wait for the SCL pin to be low before clearing APIF.
Code:
/* Only clear the interrupt flag if within a "safe zone". */
while ( /* Bus not IDLE: */
((COMMS_TWI.MASTER.STATUS & TWI_MASTER_BUSSTATE_gm) !=
TWI_MASTER_BUSSTATE_IDLE_gc)) &&
/* SCL not held by slave: */
!(COMMS_TWI.SLAVE.STATUS & TWI_SLAVE_CLKHOLD_bm)
)
{
/* Ensure that the SCL line is low */
if ( !(COMMS_PORT.IN & PIN1_bm) )
break;
}
/* Check for an pending address match interrupt */
if ( !(COMMS_TWI.SLAVE.STATUS & TWI_SLAVE_CLKHOLD_bm) )
{
/* Safely clear interrupt flag */
COMMS_TWI.SLAVE.STATUS |= (uint8_t)TWI_SLAVE_APIF_bm;
}
24. TWI START condition at bus timeout will cause transaction to be dropped
If Bus Timeout is enabled and a timeout occurs on the same Peripheral Clock cycle as a
START is detected, the transaction will be dropped.
Problem fix/Workaround
None.
25. TWI Data Interrupt Flag erroneously read as set
When issuing the TWI slave response command CMD=0b11, it takes 1 Peripheral Clock
cycle to clear the data interrupt flag (DIF). A read of DIF directly after issuing the command
will show the DIF still set.
Problem fix/Workaround
Add one NOP instruction before checking DIF.
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| MC80C52XXX-20SHXXX | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CDIP40 |
| MQ80C52CXXX-36SHXXX:D | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, CQFP44 |
| MR80C52TXXX-20/883:D | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQCC44 |
| MR80C52XXX-30SHXXX:R | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQCC44 |
| MQ80C52EXXX-30 | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MQ80C154-L16 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller |
| MQ80C186-10/BYA | 制造商:Rochester Electronics LLC 功能描述: |
| MQ80C186-12/BYA | 制造商:Rochester Electronics LLC 功能描述: |
| MQ80C186-12/BYC | 制造商:Rochester Electronics LLC 功能描述: |
| MQ80C186-12/R | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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