參數(shù)資料
型號: MPD78C12AGQA-XXX-36
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 15 MHz, MICROCONTROLLER, PZIP64
封裝: PLASTIC, QUIP-64
文件頁數(shù): 40/62頁
文件大?。?/td> 617K
代理商: MPD78C12AGQA-XXX-36
PD78C10A(A), 78C11A(A), 78C12A(A)
43
Timing waveforms
Read operation
Notes 1. The M1 signal is output to the MODE1 pin during the first opcode fetch cycle when the MODE1
pin is pulled up.
2. The IO/M signal is output to the MODE0 pin during the sr to sr2 register read cycle when the MODE0
pin is pulled up.
Write operation
Notes 3. The IO/M signal is output to the MODE0 pin during the sr to sr2 register write cycle when the
MODE0 pin is pulled up.
tCYC
Address (high - order)
Address (low - order)
Read data
tAD
tLDR
tRDH
tLA
tLR
tLL
tAL
tAFR
tRD
tRR
tRL
tAR
tML
tLM
tIL
tLI
X1
PF7-0
PD7-0
ALE
RD
MODE1
(M1)
(Note 1)
MODE0
(IO/M)
(Note 2)
Address (high - order)
Write data
tLDW
tLA
tWD
tLL
tAL
tAW
tLW
tLI
tIL
tDW
tWW
tWL
tWDH
X1
PF7-0
PD7-0
ALE
WR
MODE0
(IO/M)
(Note 3)
Address (low - order)
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