參數(shù)資料
型號: mPD789326GB-xxx-8ET
廠商: NEC Corp.
元件分類: 8位微控制器
英文描述: 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
中文描述: 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
文件頁數(shù): 28/96頁
文件大小: 482K
代理商: MPD789326GB-XXX-8ET
Preliminary Product Information U14673EJ1V0PM00
28
μ
PD789322,789324,789326,789327
5.2.3 Clock generator control registers
The clock generator is controlled by the following three registers.
Processor clock control register (PCC)
Subclock oscillation mode register (SCKM)
Subclock control register (CSS)
(1) Processor clock control register (PCC)
This register is used to select the CPU clock and set the frequency division ratio.
PCC is set using a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to 02H.
Figure 5-8. Format of Processor Clock Control Register
Symbol
<7>
6
5
4
3
2
1
0
Address
After reset
R/W
PCC
MCC
0
0
0
0
0
PCC1
0
FFFBH
02H
R/W
MCC
Main system clock oscillator operation control
0
Operation enabled
1
Operation stopped
CSS0
PCC1
CPU clock (f
CPU
) selection
Note
Minimum instruction execution time: 2f
CPU
0
0
f
X
(0.2
μ
s)
0.4
μ
s
0
1
f
X
/2
2
(0.8
μ
s)
1.6
μ
s
1
×
f
XT
/2 (61
μ
s)
122
μ
s
Note
The CPU clock is selected by a combination of flag settings in the PCC and CSS registers. (Refer to
5.2.3 (3) Subclock control register (CSS)
.)
Cautions 1. Always set bits 0 and 2 to 6 to 0.
2. MCC can be set only when the subsystem clock is selected as the CPU clock. Setting
MCC to 1 while the main system clock is operating is invalid.
Remarks 1.
f
X
: Main system clock oscillation frequency
2.
f
XT
: Subsystem clock oscillation frequency
3.
The parenthesized values apply to operation at f
X
= 5.0 MHz or f
XT
= 32.768 kHz.
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