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| 型號(hào)： | MPC9773AER2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9773 SERIES, PLL BASED CLOCK DRIVER, 13 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, 0.65 MM PITCH, LEAD FREE, PLASTIC, LQFP-52 |
| 文件頁(yè)數(shù)： | 7/19頁(yè) |
| 文件大?。?/td> | 491K |
| 代理商： | MPC9773AER2 |
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Advanced Clock Drivers Device Data
Freescale Semiconductor
15
MPC9773
Figure 17. Output-to-Output Skew tSK(O)
Figure 18. Propagation Delay (t(), Static Phase
Offset) Test Reference
Figure 19. Output Duty Cycle (DC)
The pin-to-pin skew is defined as the worst case difference in propagation
delay between any similar delay path within a single device
The time from the PLL controlled edge to the non controlled edge,
divided by the time between PLL controlled edges, expressed as
a percentage
VCC
VCC ÷ 2
GND
VCC
VCC ÷ 2
GND
tSK(O)
VCC
VCC ÷ 2
GND
tP
T0
DC = tP/T0 x 100%
VCC
VCC ÷ 2
GND
VCC
VCC ÷ 2
GND
t()
CCLKx
FB_IN
TJIT() = |T0-T1mean|
CCLKx
FB_IN
The deviation in t0 for a controlled edge with respect to a t0 mean in a random
sample of cycles
Figure 20. I/O Jitter
TN
TJIT(CC) = |TN–TN+1|
TN+1
TJIT(PER) = |TN–1/f0|
T0
Figure 21. Cycle-to-Cycle Jitter
Figure 22. Period Jitter
The variation in cycle time of a signal between adjacent cycles, over a random
sample of adjacent cycle pairs
The deviation in cycle time of a signal with respect to the ideal period over a
random sample of cycles
tF
tR
VCC = 3.3 V
2.4
0.55
Figure 23. Output Transition Time Test Reference
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC9773FA | 功能描述:鎖相環(huán) - PLL 3.3V 240MHz Clock Generator RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MPC9773FAR2 | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Driver Single 52-Pin LQFP T/R 制造商:Integrated Device Technology Inc 功能描述:MPC9773FAR2 - Tape and Reel |
| MPC9774 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:3.3V / 2,5V 1:14 LVCMOS PLL CLOCK GENERATOR |
| MPC9774AE | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 3.3V 125MHz Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9774AER2 | 功能描述:IC PLL CLK GEN 1:14 3.3V 52-LQFP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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