- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9025 > MPC93R51ACR2 (IDT, Integrated Device Technology Inc)IC PLL CLK DRIVER LV 32-LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | MPC93R51ACR2 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 3/13頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PLL CLK DRIVER LV 32-LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | PLL 時(shí)鐘發(fā)生器 |
| PLL： | 帶旁路 |
| 輸入： | LVCMOS，LVPECL |
| 輸出： | LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:9 |
| 差分 - 輸入:輸出： | 是/無(wú) |
| 頻率 - 最大： | 240MHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)
MPC93R51 REVISION 4 JANUARY 31, 2013
11
2013 Integrated Device Technology, Inc.
MPC93R51 Data Sheet
LOW VOLTAGE PLL CLOCK DRIVER
Figure 12. Propagation Delay (tPD, Static Phase
Offset) Test Reference
Figure 13. Propagation Delay (tPD) Test Reference
Figure 14. Output Duty Cycle (DC)
Figure 15. Output-to-Output Skew tSK(O)
VCC
VCC 2
GND
t()
PCLK
Ext_FB
PCLK
VCMR
The pin-to-pin skew is defined as the worst case difference
in propagation delay between any similar delay path within a
single device.
VCC
VCC 2
GND
VCC
VCC 2
GND
tSK(O)
VCC
VCC 2
GND
VCC
VCC 2
GND
t()
TCLK
Ext_FB
The time from the PLL controlled edge to the non controlled
edge, divided by the time between PLL controlled edges,
expressed as a percentage.
VCC
VCC 2
GND
tP
T0
DC = tP/T0 x 100%
Figure 16. Cycle-to-Cycle Jitter
Figure 18. I/O Jitter
Figure 19. Transition Time Test Reference
tF
tR
VCC=3.3 V
2.4
0.55
TJIT() = |T0–T1mean|
TCLK
(PCLK)
Ext_FB
The deviation in t0 for a controlled edge with respect to a t0 mean
in a random sample of cycles.
The variation in cycle time of a signal between adjacent cycles,
over a random sample of adjacent cycle pairs.
TN
TJIT(CC) = |TN–TN+1|
TN+1
The deviation in cycle time of a signal with respect to the ideal
period over a random sample of cycles.
TJIT(PER) = |TN–1/f0|
T0
Figure 17. Period Jitter
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MPC93H52ACR2 | IC CLK GEN ZD 1:11 32-LQFP |
| MPC93H51ACR2 | IC PLL CLK DRIVER LV 32-LQFP |
| MPC9351FAR2 | IC PLL CLOCK DRIVER LV 32-LQFP |
| VE-B3D-MV-F1 | CONVERTER MOD DC/DC 85V 150W |
| VE-B3B-MV-F4 | CONVERTER MOD DC/DC 95V 150W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC93R51D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LOW VOLTAGE PLL CLOCK DRIVER |
| MPC93R51FA | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 3.3V 240MHz Clock Generator RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC93R51FAR2 | 制造商:Integrated Device Technology Inc 功能描述:PLL CLOCK DRVR SGL 32LQFP - Tape and Reel |
| MPC93R52 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LOW VOLTAGE 3.3V LVCMOS 1:11 CLOCK GENERATOR |
| MPC93R52AC | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 FSL 1-11 LVCMOS PLL Clock Generator, pwr RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。