參數(shù)資料
型號(hào): MPC880ZP133
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 133 MHz, RISC PROCESSOR, PBGA357
封裝: 25 X 25 MM, 1.27 MM PITCH, PLASTIC, MS-034BAK-1, BGA-357
文件頁(yè)數(shù): 6/92頁(yè)
文件大?。?/td> 1499K
代理商: MPC880ZP133
14
MPC885/MPC880 Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Power Supply and Power Sequencing
7.5
Experimental Determination
To determine the junction temperature of the device in the application after prototypes are available, the
thermal characterization parameter (
ΨJT) can be used to determine the junction temperature with a
measurement of the temperature at the top center of the package case using the following equation:
TJ = TT + (ΨJT × PD)
where:
Ψ
JT = thermal characterization parameter
TT = thermocouple temperature on top of package
PD = power dissipation in package
The thermal characterization parameter is measured per the JESD51-2 specification published by JEDEC
using a 40 gauge type T thermocouple epoxied to the top center of the package case. The thermocouple
should be positioned so that the thermocouple junction rests on the package. A small amount of epoxy is
placed over the thermocouple junction and over about 1 mm of wire extending from the junction. The
thermocouple wire is placed flat against the package case to avoid measurement errors caused by the cooling
effects of the thermocouple wire.
7.6
References
Semiconductor Equipment and Materials International
(415) 964-5111
805 East Middlefield Rd
Mountain View, CA 94043
MIL-SPEC and EIA/JESD (JEDEC) specifications
800-854-7179 or
(Available from Global Engineering Documents)
303-397-7956
JEDEC Specifications
http://www.jedec.org
1. C.E. Triplett and B. Joiner, “An Experimental Characterization of a 272 PBGA Within an Automotive
Engine Controller Module,” Proceedings of SemiTherm, San Diego, 1998, pp. 47-54.
2. B. Joiner and V. Adams, “Measurement and Simulation of Junction to Board Thermal Resistance and Its
Application in Thermal Modeling,” Proceedings of SemiTherm, San Diego, 1999, pp. 212-220.
8
Power Supply and Power Sequencing
This section provides design considerations for the MPC885/880 power supply. The MPC885/880 has a
core voltage (VDDL) and PLL voltage (VDDSYN), which both operate at a lower voltage than the I/O voltage
VDDH. The I/O section of the MPC885/880 is supplied with 3.3 V across VDDH and VSS (GND).
The signals PA[0:15], PB[14:31], PC[4:15], PD[3:15], TDI, TDO, TCK, TRST_B, TMS, MII_TXEN, and
MII_MDIO are 5-V tolerant. All inputs cannot be more than 2.5 V greater than VDDH. In addition, 5-V
tolerant pins can not exceed 5.5 V and remaining input pins cannot exceed 3.465 V. This restriction applies
to power up/down and normal operation.
One consequence of multiple power supplies is that when power is initially applied the voltage rails ramp
up at different rates. The rates depend on the nature of the power supply, the type of load on each power
supply, and the manner in which different voltages are derived. The following restrictions apply:
VDDL must not exceed VDDH during power up and power down.
VDDL must not exceed 1.9 V, and VDDH must not exceed 3.465 V.
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