參數(shù)資料
型號: MPC880ZP133
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 133 MHz, RISC PROCESSOR, PBGA357
封裝: 25 X 25 MM, 1.27 MM PITCH, PLASTIC, MS-034BAK-1, BGA-357
文件頁數(shù): 16/92頁
文件大?。?/td> 1499K
代理商: MPC880ZP133
23
MPC885/MPC880 Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Bus Signal Timing
Figure 5 provides the control timing diagram.
Figure 5. Control Timing
4 The D(0:31) input timings B18 and B19 refer to the rising edge of the CLKOUT in which the TA input signal is asserted.
5 For part speeds above 50 MHz, use 2 ns for B19.
6 The D(0:31) input timings B20 and B21 refer to the falling edge of the CLKOUT. This timing is valid only for read
accesses controlled by chip-selects under control of the user-programmable machine (UPM) in the memory
controller, for data beats where DLT3 = 1 in the RAM words. (This is only the case where data is latched on the falling
edge of CLKOUT.)
7 The timing B30 refers to CS when ACS = 00 and to WE(0:3) when CSNT = 0.
8 The signal UPWAIT is considered asynchronous to the CLKOUT and synchronized internally. The timings specified
in B37 and B38 are specified to enable the freeze of the UPM output signals as described in Figure 20.
9 The AS signal is considered asynchronous to the CLKOUT. The timing B39 is specified in order to allow the behavior
specified in Figure 23.
CLKOUT
Outputs
A
B
2.0 V
0.8 V
2.0 V
0.8 V
2.0 V
0.8 V
Outputs
2.0 V
0.8 V
2.0 V
0.8 V
B
A
Inputs
2.0 V
0.8 V
2.0 V
0.8 V
D
C
Inputs
2.0 V
0.8 V
2.0 V
0.8 V
C
D
A
Maximum output delay specification
B
Minimum output hold time
C
Minimum input setup time specification
D
Minimum input hold time specification
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