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參數(shù)資料
| 型號(hào)： | MPC855TCVR50D4 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 13/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC 50MHZ 357PBGA |
| 標(biāo)準(zhǔn)包裝： | 44 |
| 系列： | MPC8xx |
| 處理器類型： | 32-位 MPC8xx PowerQUICC |
| 速度： | 50MHz |
| 電壓： | 3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 357-BBGA |
| 供應(yīng)商設(shè)備封裝： | 357-PBGA（25x25） |
| 包裝： | 托盤 |
MOTOROLA
MPC855T Communications Controller Technical Summary
7
MPC855T Architecture Overview
— 3.3-V operation (No support for 5V I/O)
— 357-pin ball grid array (BGA) package
1.2
MPC855T Architecture Overview
The MPC855T is comprised of four modules connected to the 32-bit internal bus: the embedded MPC8xx
core, the system integration unit (SIU), the communications processor module (CPM), and the Fast Ethernet
controller (FEC). The MPC855T block diagram is shown in Figure 1.
Figure 1. MPC855T Block Diagram
1.2.1
Embedded MPC8xx Core
The embedded MPC8xx core is compliant with the PowerPC user instruction set architecture; refer to
Programming Environments Manual for 32-Bit Implementations of the PowerPC Architecture for more
information. The embedded MPC8xx core is a fully-static design that consists of two functional units—the
integer unit and the load/store unit. It executes all integer and load/store operations directly on the hardware.
The core supports integer operations on a 32-bit internal data path and 32-bit arithmetic hardware. The core
interface to the internal and external buses is 32 bits. The core uses a two-instruction load/store queue, a
four- instruction prefetch queue, and a six-instruction history buffer. The core performs branch folding and
EMBEDDED
4 KBYTE
I CACHE
IMMU
4 KBYTE
D CACHE
DMMU
SYSTEM INTEGRATION UNIT
MEMORY CONTROLLER
BUS INTERFACE UNIT
SYSTEM FUNCTIONS
LOAD/STORE
BUS
INSTRUCTION
BUS
PARALLEL I / O
BAUD RATE
GENERATORS
8K DUAL-PORT
RAM
INTERRUPT
CONTROLLER
4
TIMERS
10 SERIAL
2 VIRTUAL
PARALLEL
INTERFACE PORT
32-BIT RISC MICROCONTROLLER
AND PROGRAM ROM
SCC1
SPI
I2C
SMC1
TIMER
SERIAL INTERFACE
TIME SLOT ASSIGNER
SMC2
REAL TIME CLOCK
PCMCIA INTERFACE
MPC8XX
CORE
DMA’S
FIFO’S
10/100
MAC
MII
IDMA
CHANNELS
DMA
CHANNELS
UNIFIED BUS
COMMUNICATIONS
PROCESSOR
MODULE
AND
MBPS
FAST
ETHERNET
CONTROLLER
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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| MPC855TCZQ50D4 | 功能描述:微處理器 - MPU POWER QUICC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC855TCZQ50D4R2 | 功能描述:微處理器 - MPU POWER QUICC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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