- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗3939 > MPC8545EVTAQGB (Freescale Semiconductor)MPU POWERQUICC III 783-PBGA PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MPC8545EVTAQGB |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 104/151闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | MPU POWERQUICC III 783-PBGA |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 绯诲垪锛� | MPC85xx |
| 铏曠悊鍣ㄩ鍨嬶細 | 32-浣� MPC85xx PowerQUICC III |
| 閫熷害锛� | 1.0GHz |
| 闆诲锛� | 1.1V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 783-BBGA锛孎(xi脿n)CBGA |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 783-FCPBGA锛�29x29锛� |
| 鍖呰锛� | 鎵樼洡 |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�绗�76闋�绗�77闋�绗�78闋�绗�79闋�绗�80闋�绗�81闋�绗�82闋�绗�83闋�绗�84闋�绗�85闋�绗�86闋�绗�87闋�绗�88闋�绗�89闋�绗�90闋�绗�91闋�绗�92闋�绗�93闋�绗�94闋�绗�95闋�绗�96闋�绗�97闋�绗�98闋�绗�99闋�绗�100闋�绗�101闋�绗�102闋�绗�103闋�鐣�(d膩ng)鍓嶇104闋�绗�105闋�绗�106闋�绗�107闋�绗�108闋�绗�109闋�绗�110闋�绗�111闋�绗�112闋�绗�113闋�绗�114闋�绗�115闋�绗�116闋�绗�117闋�绗�118闋�绗�119闋�绗�120闋�绗�121闋�绗�122闋�绗�123闋�绗�124闋�绗�125闋�绗�126闋�绗�127闋�绗�128闋�绗�129闋�绗�130闋�绗�131闋�绗�132闋�绗�133闋�绗�134闋�绗�135闋�绗�136闋�绗�137闋�绗�138闋�绗�139闋�绗�140闋�绗�141闋�绗�142闋�绗�143闋�绗�144闋�绗�145闋�绗�146闋�绗�147闋�绗�148闋�绗�149闋�绗�150闋�绗�151闋�
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
56
Freescale Semiconductor
I2C
13 I2C
This section describes the DC and AC electrical characteristics for the I2C interfaces of the device.
13.1
I2C DC Electrical Characteristics
This table provides the DC electrical characteristics for the I2C interfaces.
13.2
I2C AC Electrical Specifications
This table provides the AC timing parameters for the I2C interfaces.
Table 45. I2C DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
Notes
Input high voltage level
VIH
0.7
OV
DD
OVDD +0.3
V
鈥�
Input low voltage level
VIL
鈥�0.3
0.3
OV
DD
V鈥�
Low level output voltage
VOL
00.2
OV
DD
V1
Pulse width of spikes which must be suppressed by the
input filter
tI2KHKL
050
ns
2
Input current each I/O pin (input voltage is between
0.1
OV
DD and 0.9 OVDD(max)
II
鈥�10
10
A3
Capacitance for each I/O pin
CI
鈥�10
pF
鈥�
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. See the MPC8548E PowerQUICC III Integrated Processor Family Reference Manual, for information on the digital filter
used.
3. I/O pins obstruct the SDA and SCL lines if OVDD is switched off.
Table 46. I2C AC Electrical Specifications
Parameter
Symbol1
Min
Max
Unit
Notes
SCL clock frequency
fI2C
0400
kHz
鈥�
Low period of the SCL clock
tI2CL
1.3
鈥�
s4
High period of the SCL clock
tI2CH
0.6
鈥�
s4
Setup time for a repeated START condition
tI2SVKH
0.6
鈥�
s4
Hold time (repeated) START condition (after this period,
the first clock pulse is generated)
tI2SXKL
0.6
鈥�
s4
Data setup time
tI2DVKH
100
鈥�
ns
4
Data input hold time:
CBUS compatible masters
I2C bus devices
tI2DXKL
鈥�
0
鈥�
s2
Data output delay time:
tI2OVKL
鈥�0.9
鈥�
3
Set-up time for STOP condition
tI2PVKH
0.6
鈥�
s鈥�
Bus free time between a STOP and START condition
tI2KHDX
1.3
鈥�
s鈥�
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| CAT93C66XI-T2 | IC EEPROM 4KBIT 2MHZ 8SOIC |
| MPC8544VTARJ | MPU POWERQUICC III 783-PBGA |
| CAT25010VP2I-GT3 | IC EEPROM 1KB SPI SERIAL 8TDFN |
| MPC8544VTAQG | MPU POWERQUICC III 783-PBGA |
| CAT24C04HU4I-GT3 | IC EEPROM 4KB I2C SERIAL 8UDFN |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MPC8545EVTATGA | 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU PQ3 8545E Imaging Processor RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324 |
| MPC8545EVTATGB | 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU FG PQ38 8548 PB Free RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324 |
| MPC8545EVTATGC | 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU REV2.1.3 FG Part RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324 |
| MPC8545EVTATGD | 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU PQ38 ST WE 1200 R3.0 RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324 |
| MPC8545EVUANG | 鍔熻兘鎻忚堪:寰檿鐞嗗櫒 - MPU PQ38 8548E PB-FREE RoHS:鍚� 鍒堕€犲晢:Atmel 铏曠悊鍣ㄧ郴鍒�:SAMA5D31 鏍稿績:ARM Cortex A5 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:536 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:32 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鎺ュ彛椤炲瀷:CAN, Ethernet, LIN, SPI,TWI, UART, USB 宸ヤ綔闆绘簮闆诲:1.8 V to 3.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-324 |
鐧�(f膩)甯冪穵鎬ラ噰璩�锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�
