參數(shù)資料
型號: MPC8540VTAQFC
廠商: Freescale Semiconductor
文件頁數(shù): 95/104頁
文件大?。?/td> 0K
描述: MPU POWERQUICC III 783FCPBGA
標(biāo)準(zhǔn)包裝: 36
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.0GHz
電壓: 1.3V
安裝類型: 表面貼裝
封裝/外殼: 784-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8540 Integrated Processor Hardware Specifications, Rev. 4.1
90
Freescale Semiconductor
System Design Information
Figure 53. Driver Impedance Measurement
The output impedance of the RapidIO port drivers targets 200-
Ω differential resistance. The value of this
resistance and the strength of the driver’s current source can be found by making two measurements. First,
the output voltage is measured while driving logic 1 without an external differential termination resistor.
The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured while driving logic
1 with an external precision differential termination resistor of value Rterm. The measured voltage is
V2 = 1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource = Rterm × (V1/V2 –1). The
drive current is then Isource =V1/Rsource.
Table 60 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD,
nominal OVDD, 105°C.
Table 60. Impedance Characteristics
Impedance
Local Bus, Ethernet,
DUART, Control,
Configuration, Power
Management
PCI/PCI-X
DDR DRAM
RapidIO
Symbol
Unit
RN
43 Target
25 Target
20 Target
NA
Z0
W
RP
43 Target
25 Target
20 Target
NA
Z0
W
Differential
NA
200 Target
ZDIFF
W
Note: Nominal supply voltages. See Table 1, Tj = 105°C.
OVDD
OGND
RP
RN
Pad
Data
SW1
SW2
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