參數(shù)資料
型號(hào): MPC8540VT833LC
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 3/104頁(yè)
文件大?。?/td> 0K
描述: MPU POWERQUICC III 783FCPBGA
標(biāo)準(zhǔn)包裝: 36
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 833MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 784-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8540 Integrated Processor Hardware Specifications, Rev. 4.1
100
Freescale Semiconductor
Device Nomenclature
19 Device Nomenclature
Ordering information for the parts fully covered by this specification document is provided in
19.1 Nomenclature of Parts Fully Addressed by this Document
Table 62 provides the Freescale part numbering nomenclature for the MPC8540. Note that the individual
part numbers correspond to a maximum processor core frequency. For available frequencies, contact your
local Freescale sales office. In addition to the processor frequency, the part numbering scheme also
includes an application modifier which may specify special application conditions. Each part number also
contains a revision code which refers to the die mask revision number.
Table 62. Part Numbering Nomenclature
MPC
nnnn
t
pp
ff(f)
c
r
Product
Code
Part
Identifier
Temperature
Range1
Package 2
Processor
Frequency 3, 4
Platform
Frequency
Revision Level
MPC
8540
Blank = 0 to 105
°C
C = –40 to 105
°C
PX = FC-PBGA
VT = FC-PBGA
(Pb-free)
833 = 833 MHz
667 = 667 MHz
L = 333 MHz
J = 266 MHz
B = Rev. 2.0
(SVR = 0x80300020)
C = Rev. 2.1
(SVR = 0x80300021)
MPC
8540
Blank = 0 to 105
°C
C = –40 to 105
°C
PX = FC-PBGA
VT = FC-PBGA
(Pb-free)
AQ = 1.0 GHz
F = 333 MHz
B = Rev. 2.0
(SVR = 0x80300020)
C = Rev. 2.1
(SVR = 0x80300021)
Notes:
1.For Temperature Range=C, Processor Frequency is limited to 667 MHz.
2.See Section 14, “Package and Pin Listings,” for more information on available package types.
3.Processor core frequencies supported by parts addressed by this specification only. Not all parts described in this
specification support all core frequencies. The core must be clocked at a minimum frequency of 400MHz. A device must
not be used beyond the core frequency or platform frequency indicated on the device.
4.Designers should use the maximum power value corresponding to the core and platform frequency grades indicated on the
device. A lower maximum power value should not be assumed for design purposes even when running at a lower
frequency.
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