參數(shù)資料
型號: MPC853TVR80
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 80 MHz, RISC PROCESSOR, PBGA256
封裝: PLASTIC, BGA-256
文件頁數(shù): 28/88頁
文件大?。?/td> 1185K
代理商: MPC853TVR80
MPC853T Hardware Specification, Rev. 1
34
Freescale Semiconductor
Bus Signal Timing
Table 10 provides interrupt timing for the MPC853T.
.
Figure 23 provides the interrupt detection timing for the external level-sensitive lines.
Figure 23. Interrupt Detection Timing for External Level-Sensitive Lines
Figure 24 provides the interrupt detection timing for the external edge-sensitive lines.
Figure 24. Interrupt Detection Timing for External Edge-Sensitive Lines
Table 10. Interrupt Timing
Num
Characteristic 1
1
The I39 and I40 timings describe the testing conditions under which the IRQ lines are tested when being defined as
level sensitive. The IRQ lines are synchronized internally and do not have to be asserted or negated with reference
to the CLKOUT.
The timings I41, I42, and I43 are specified to allow the correct function of the IRQ lines detection circuitry and have
no direct relation with the total system interrupt latency that the MPC853T is able to support.
All Frequencies
Unit
Min
Max
I39
IRQx valid to CLKOUT rising edge (setup time)
6.00
ns
I40
IRQx hold time after CLKOUT
2.00
ns
I41
IRQx pulse width low
3.00
ns
I42
IRQx pulse width high
3.00
ns
I43
IRQx edge-to-edge time
4
× TCLOCKOUT
CLKOUT
IRQx
I39
I40
CLKOUT
IRQx
I41
I42
I43
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