參數資料
型號: MPC8535CVTATH
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1250 MHz, MICROPROCESSOR, PBGA783
封裝: 29 X 29 MM, 2.80 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, FCBGA-783
文件頁數: 70/126頁
文件大小: 2861K
代理商: MPC8535CVTATH
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
Freescale Semiconductor
48
Figure 22 shows the TBI transmit AC timing diagram.
Figure 22. TBI Transmit AC Timing Diagram
2.9.2.4.2
TBI Receive AC Timing Specifications
Table 33 provides the TBI receive AC timing specifications.
Table 33. TBI Receive AC Timing Specifications
At recommended operating conditions with L/TVDD of 3.3 V ± 5%.
Parameter/Condition2
Symbol 1
Min
Typ
Max
Unit
Clock period for TBI Receive Clock 0, 1
tTRX
—16.0
ns
Skew for TBI Receive Clock 0, 1
tSKTRX
7.5
8.5
ns
Duty cycle for TBI Receive Clock 0, 1
tTRXH/tTRX
40
60
%
RCG[9:0] setup time to rising edge of TBI Receive Clock 0, 1
tTRDVKH
2.5
——ns
RCG[9:0] hold time to rising edge of TBI Receive Clock 0, 1
tTRDXKH
1.5
——ns
Clock rise time (20%-80%) for TBI Receive Clock 0, 1
tTRXR
0.7
2.4
ns
Clock fall time (80%-20%) for TBI Receive Clock 0, 1
tTRXF
0.7
2.4
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state)
(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tTRDVKH
symbolizes TBI receive timing (TR) with respect to the time data input signals (D) reach the valid state (V) relative to the
tTRX clock reference (K) going to the high (H) state or setup time. Also, tTRDXKH symbolizes TBI receive timing (TR) with
respect to the time data input signals (D) went invalid (X) relative to the tTRX clock reference (K) going to the high (H)
state. Note that, in general, the clock reference symbol representation is based on three letters representing the clock of
a particular functional. For example, the subscript of tTRX represents the TBI (T) receive (RX) clock. For rise and fall times,
the latter convention is used with the appropriate letter: R (rise) or F (fall). For symbols representing skews, the subscript
is skew (SK) followed by the clock that is being skewed (TRX).
2. The signals “TBI Receive Clock 0” and “TBI Receive Clock 1” refer to TSECn_RX_CLK and TSECn_TX_CLK pins
respectively. These two clock signals are also referred as PMA_RX_CLK[0:1].
GTX_CLK
TCG[9:0]
tTTXR
tTTX
tTTXH
tTTXR
tTTXF
tTTKHDV
tTTKHDX
tTTXF
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