參數(shù)資料
型號(hào)： MPC852TCZT80A
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 13/80頁(yè)
文件大?。?/td> 0K
描述： IC MPU POWERQUICC 80MHZ 256PBGA
標(biāo)準(zhǔn)包裝： 60
系列： MPC8xx
處理器類型： 32-位 MPC8xx PowerQUICC
速度： 80MHz
電壓： 1.8V
安裝類型： 表面貼裝
封裝/外殼： 256-BGA
供應(yīng)商設(shè)備封裝： 256-PBGA（23x23）
包裝： 托盤
MPC852T PowerQUICC Hardware Specifications, Rev. 4
20
Freescale Semiconductor
Bus Signal Timing
B32a
CLKOUT falling edge to BS valid - as
requested by control bit BST1 in the
corresponding word in the UPM, EBDF = 0
(MAX = 0.25
× B1 + 6.80)
7.60
14.30
6.30
13.00
5.00
11.80
3.80
10.50
ns
B32b
CLKOUT rising edge to BS valid - as
requested by control bit BST2 in the
corresponding word in the UPM
(MAX = 0.00
× B1 + 8.00)
1.50
8.00
1.50
8.00
1.50
8.00
1.50
8.00
ns
B32c
CLKOUT rising edge to BS valid - as
requested by control bit BST3 in the
corresponding word in the UPM
(MAX = 0.25
× B1 + 6.80)
7.60
14.30
6.30
13.00
5.00
11.80
3.80
10.50
ns
B32d
CLKOUT falling edge to BS valid- as
requested by control bit BST1 in the
corresponding word in the UPM, EBDF = 1
(MAX = 0.375
× B1 + 6.60)
13.30
18.00
11.30
16.00
9.40
14.10
7.60
12.30
ns
B33
CLKOUT falling edge to GPL valid - as
requested by control bit GxT4 in the
corresponding word in the UPM
(MAX = 0.00
× B1 + 6.00)
1.50
6.00
1.50
6.00
1.50
6.00
1.50
6.00
ns
B33a
CLKOUT rising edge to GPL Valid - as
requested by control bit GxT3 in the
corresponding word in the UPM
(MAX = 0.25
× B1 + 6.80)
7.60
14.30
6.30
13.00
5.00
11.80
3.80
10.50
ns
B34
A(0:31), BADDR(28:30), and D(0:31) to
CS valid - as requested by control bit
CST4 in the corresponding word in the
UPM (MIN = 0.25
× B1 – 2.00)
5.60
—
4.30
—
3.00
—
1.80
—
ns
B34a
A(0:31), BADDR(28:30), and D(0:31) to
CS valid - as requested by control bit
CST1 in the corresponding word in the
UPM (MIN = 0.50
× B1 – 2.00)
13.20
—
10.50
—
8.00
—
5.60
—
ns
B34b
A(0:31), BADDR(28:30), and D(0:31) to
CS valid - as requested by CST2 in the
corresponding word in UPM
(MIN = 0.75
× B1 – 2.00)
20.70
—
16.70
—
13.00
—
9.40
—
ns
B35
A(0:31), BADDR(28:30) to CS valid - as
requested by control bit BST4 in the
corresponding word in the UPM
(MIN = 0.25
× B1 – 2.00)
5.60
—
4.30
—
3.00
—
1.80
—
ns
B35a
A(0:31), BADDR(28:30), and D(0:31) to
BS valid - As Requested by BST1 in the
corresponding word in the UPM
(MIN = 0.50
× B1 – 2.00)
13.20
—
10.50
—
8.00
—
5.60
—
ns
Table 9. Bus Operation Timings (continued)
Num
Characteristic
33 MHz
40 MHz
50 MHz
66 MHz
Unit
Min
Max
Min
Max
Min
Max
Min
Max
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MPC852TVR50 制造商:Freescale Semiconductor 功能描述:
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