參數(shù)資料
型號： MPC852TCZT50A
廠商： Freescale Semiconductor
文件頁數(shù)： 67/80頁
文件大?。?/td> 0K
描述： IC MPU POWERQUICC 50MHZ 256PBGA
標(biāo)準(zhǔn)包裝： 60
系列： MPC8xx
處理器類型： 32-位 MPC8xx PowerQUICC
速度： 50MHz
電壓： 1.8V
安裝類型： 表面貼裝
封裝/外殼： 256-BGA
供應(yīng)商設(shè)備封裝： 256-PBGA（23x23）
包裝： 托盤
MPC852T PowerQUICC Hardware Specifications, Rev. 4
Freescale Semiconductor
7
Thermal Characteristics
This device contains circuitry protecting against damage that high-static voltage or electrical fields cause;
however, Freescale recommends taking normal precautions to avoid application of any voltages higher
than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if
unused inputs are tied to an appropriate logic voltage level (for example, either GND or VDD).
4
Thermal Characteristics
Table 3 shows the thermal characteristics for the MPC852T.
Table 2. Operating Temperatures
Rating
Symbol
Value
Unit
Temperature 1 (standard)
1 Minimum temperatures are guaranteed as ambient temperature, T
A. Maximum temperatures are guaranteed as junction
temperature, Tj.
TA(min)
0°C
Tj(max)
95
°C
Temperature (extended)
TA(min)
– 40
°C
Tj(max)
100
°C
Table 3. MPC852T Thermal Resistance Data
Rating
Environment
Symbol
Value
Unit
Junction-to-ambient1
1 Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, airflow, power dissipation of other components on the board, and board thermal resistance.
Natural convection
Single-layer board (1s)
RθJA
2
2 Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board horizontal
49
°C/W
Four-layer board (2s2p)
RθJMA
3
3 Per JEDEC JESD51-6 with the board horizontal
32
Airflow (200 ft/min)
Single-layer board (1s)
RθJMA
3
41
Four-layer board (2s2p)
RθJMA
3
29
Junction-to-board4
4 Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
RθJB
24
Junction-to-case5
5 Indicates the average thermal resistance between the die and the case top surface as measured by the cold plate method
(MIL SPEC-883 Method 1012.1) with the cold plate temperature used for the case temperature. For exposed pad packages
where the pad would be expected to be soldered, junction-to-case thermal resistance is a simulated value from the junction to
the exposed pad without contact resistance.
RθJC
13
Junction-to-package top6
6 Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2
Natural convection
ΨJT
3
Airflow (200 ft/min)
ΨJT
2
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