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MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
8
Freescale Semiconductor
2.1.2
Power Supply Voltage Specification
This table provides recommended operating conditions for the device. Note that the values in this table are
the recommended and tested operating conditions. Proper device operation outside of these conditions is
not guaranteed.
Table 3. Recommended Operating Conditions
Characteristic
Symbol
Recommended
Value
Unit
Note
Core supply voltage
up to 667 MHz
VDD
1.0 ± 50 mV
V
800 MHz
1.05 ± 50 mV
V
PLL supply voltage (e300 core, eLBC and
system)
up to 667 MHz
AVDD
1.0 ± 50 mV
V
800 MHz
1.05 ± 50 mV
V
DDR1 and DDR2 DRAM I/O voltage
GVDD
2.5 V ± 125 mV
1.8 V ± 90 mV
Three-speed Ethernet I/O, MII management voltage
LVDD[1,2]
3.3 V ± 165 mV
2.5 V ± 125 mV
V—
PCI, local bus, DUART, system control and power management, I2C, and
JTAG I/O voltage
OVDD
3.3 V ± 165 mV
V
Local Bus
LBVDD
1.8 V ± 90 mV
2.5 V ± 125 mV
3.3 V ± 165 mV
V—
SerDes
up to 667 MHz
L[1,2]_
nVDD
1.0 ± 50 mV
V
800 MHz
1.05 V ± 50 mV
V
Operating temperature range
commerical
Ta
Tj
Ta=0 (min)—
Tj=125 (max)
°C—
extended temperature
Ta
Tj
Ta=–40 (min)—
Tj=125 (max)
°C—
Notes:
1. GVDD, OVDD, AVDD, and VDD must track each other and must vary in the same direction—either in the positive or negative
direction.
2. AVDD is the input to the filter discussed in Section 24.1, “PLL Power Supply Filtering,” and is not necessarily the voltage at
the AVDD pin.
3. L[1,2]_
nVDD, SDAVDD_0, XCOREVDD, and XPADVDD power inputs.
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