參數(shù)資料
型號: MPC8377E-RDBA
廠商: Freescale Semiconductor
文件頁數(shù): 75/127頁
文件大?。?/td> 0K
描述: BOARD REF DES MPC8377 REV 2.1
設(shè)計(jì)資源: MPC8379E-RDB Ref Design Guide
標(biāo)準(zhǔn)包裝: 1
系列: PowerQUICC II™ PRO
類型: MPU
適用于相關(guān)產(chǎn)品: MPC8377E
所含物品: 板,CD
相關(guān)產(chǎn)品: MPC8378EVRANG-ND - MPU PWRQUICC II 800MHZ 689TEPBGA
MPC8378EVRALG-ND - MPU PWRQUICC II 667MHZ 689TEPBGA
MPC8378EVRAJF-ND - MPU PWRQUICC II 533MHZ 689TEPBGA
MPC8378EVRAGD-ND - MPU PWRQUICC II 400MHZ 689TEPBGA
MPC8379EVRANG-ND - MPU PWRQUICC II 800MHZ 689TEPBGA
MPC8379EVRALG-ND - MPU PWRQUICC II 667MHZ 689TEPBGA
MPC8379EVRAJF-ND - MPU PWRQUICC II 533MHZ 689TEPBGA
MPC8379EVRAGD-ND - MPU PWRQUICC II 400MHZ 689TEPBGA
MPC8377EVRALG-ND - MPU PWRQUICC II 667MHZ 689TEPBGA
MPC8377EVRAJF-ND - MPU PWRQUICC II 533MHZ 689TEPBGA
更多...
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
Freescale Semiconductor
51
This means that data delay should be equal or less than the clock delay in the ideal case where
tSHSCLKL =10 ns:
tDATA_DELAY tCLK_DELAY < 10 6 4
tDATA_DELAY tCLK_DELAY < 0
11.3.1.2
High-Speed Write Meeting Hold (Minimum Delay)
The following equations show how to calculate the allowed skew range between the SD_CLK and
SD_DAT/CMD signals on the PCB.
tCLK_DELAY < tSHSCKL + tSHSKHOX + tDATA_DELAY tIH
Eqn. 13
tCLK_DELAY tDATA_DELAY < tSHSCKL + tSHSKHOX tIH
Eqn. 14
This means that clock can be delayed versus data up to 8 ns (external delay line) in ideal case of
tSHSCLKL =10 ns:
tCLK_DELAY tDATA_DELAY < 10 + 0 2
tCLK_DELAY tDATA_DELAY < 8
11.3.2
High-Speed Input Path (Read)
This figure provides the data and command input timing diagram.
Figure 31. High-Speed Input Path
For the input path, the device eSDHC expects to sample the data 1.5 internal clock cycles after it was
driven by the SD card. Since in this mode the SD card drives the data at the rising edge of the clock, a
sufficient delay to the clock and the data must exist to ensure it will not be sampled at the wrong internal
tCLK_DELAY
Output from the
SD CLK at
the Card Pin
SD Card Pins
tSHSIVKH
Driving
Edge
Sampling
Edge
tOH
tDATA_DELAY
tODLY
tSHSCK (Clock Cycle)
1/2 Cycle
tSHSIXKH
Right Edge
Wrong Edge
(MPC8377E Input Hold)
(MPC8377E Input Setup)
Input at the
MPC8377E Pins
SD CLK at the
MPC8377E Pin
相關(guān)PDF資料
PDF描述
0210490904 CABLE JUMPER 1.25MM .102M 21POS
EYM12DTBS-S189 CONN EDGECARD 24POS R/A .156 SLD
0210490240 CABLE JUMPER 1.25MM .102M 18POS
EYM12DTAS-S189 CONN EDGECARD 24POS R/A .156 SLD
0210490239 CABLE JUMPER 1.25MM .102M 18POS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC8377E-RDBA 制造商:Freescale Semiconductor 功能描述:MPC837x Family Reference Desig
MPC8377EVRAFDA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAFFA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAFGA 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications
MPC8377EVRAGD 功能描述:微處理器 - MPU PBGA W/ ENCR RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324