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參數(shù)資料
| 型號： | MPC8360CZUAJDGA |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 70/102頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC II PRO 740TBGA |
| 標(biāo)準(zhǔn)包裝： | 21 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 533MHz |
| 電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 740-LBGA |
| 供應(yīng)商設(shè)備封裝： | 740-TBGA（37.5x37.5） |
| 包裝： | 托盤 |
| 配用： | MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC |
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MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
Freescale Semiconductor
7
— Programmable highest priority request
— Four groups of interrupts with programmable priority
— External and internal interrupts directed to communication processor
— Redirects interrupts to external INTA pin when in core disable mode
— Unique vector number for each interrupt source
Dual industry-standard I2C interfaces
— Two-wire interface
— Multiple master support
— Master or slave I2C mode support
— On-chip digital filtering rejects spikes on the bus
— System initialization data is optionally loaded from I2C-1 EPROM by boot sequencer embedded hardware
DMA controller
— Four independent virtual channels
— Concurrent execution across multiple channels with programmable bandwidth control
— All channels accessible by local core and remote PCI masters
— Misaligned transfer capability
— Data chaining and direct mode
— Interrupt on completed segment and chain
— DMA external handshake signals: DMA_DREQ[0:3]/DMA_DACK[0:3]/DMA_DONE[0:3]. There is one set for
each DMA channel. The pins are multiplexed to the parallel IO pins with other QE functions.
DUART
— Two 4-wire interfaces (RxD, TxD, RTS, CTS)
— Programming model compatible with the original 16450 UART and the PC16550D
System timers
— Periodic interrupt timer
— Real-time clock
— Software watchdog timer
— Eight general-purpose timers
IEEE Std. 1149.1-compliant, JTAG boundary scan
Integrated PCI bus and SDRAM clock generation
2
Electrical Characteristics
This section provides the AC and DC electrical specifications and thermal characteristics for the MPC8360E/58E. The device
is currently targeted to these specifications. Some of these specifications are independent of the I/O cell, but are included for a
more complete reference. These are not purely I/O buffer design specifications.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8360CZUAJDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360CZUAJFGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360CZUAJFHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360CZUALDGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
| MPC8360CZUALDHA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications |
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