
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
Freescale Semiconductor
61
AC Test Load
18.3
AC Test Load
These figures represent the AC timing from
Table 62 and
Table 63. Note that although the specifications generally reference the
rising edge of the clock, these AC timing diagrams also apply when the falling edge is the active edge.
This figure shows the timing with external clock.
Figure 50. AC Timing (External Clock) Diagram
This figure shows the timing with internal clock.
Figure 51. AC Timing (Internal Clock) Diagram
Serial CLK (Input)
tHEIXKH
tHEIVKH
tHEKHOV
Input Signals:
(See Note)
Output Signals:
(See Note)
tHEKHOX
Note: The clock edge is selectable.
Serial CLK (Output)
tHIIXKH
tHIKHOV
Input Signals:
(See Note)
tHIIVKH
tHIKHOX
Note: The clock edge is selectable.
Output Signals:
(See Note)