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    參數(shù)資料
    

    


    


    
型號(hào)：
MPC8360CZUADDH

    

    
廠商：
Freescale Semiconductor

    

    
文件頁數(shù)：
12/102頁

    

    
文件大?。?/td>
0K

    

    
描述：
IC MPU PWRQUICC II 740-TBGA

    

    
標(biāo)準(zhǔn)包裝：
21

    

    
系列：
MPC83xx

    

    
處理器類型：
32-位 MPC83xx PowerQUICC II Pro
    		

    

    
速度：
266MHz
    		

    

    
電壓：
1.2V
    		

    

    
安裝類型：
表面貼裝
    		

    

    
封裝/外殼：
740-LBGA
    		

    

    
供應(yīng)商設(shè)備封裝：
740-TBGA（37.5x37.5）
    		

    

    
包裝：
托盤
    		

    

    
配用：
MPC8360EA-MDS-PB-ND - KIT APPLICATION DEV 8360 SYSTEM
    MPC8360E-RDK-ND - BOARD REFERENCE DESIGN FOR MPC
    		

    

    

    

	
    
    
    

    
    
	
    MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
    Freescale Semiconductor
    17
    RESET AC Electrical Characteristics
    5.2
    RESET AC Electrical Characteristics
    This section describes the AC electrical specifications for the reset initialization timing requirements of the device. This table
    provides the reset initialization AC timing specifications for the DDR SDRAM component(s).
    This table provides the PLL and DLL lock times.
    Table 11. RESET Initialization Timing Specifications
    Parameter/Condition
    Min
    Max
    Unit
    Notes
    Required assertion time of HRESET or SRESET (input) to activate reset
    flow
    32
    —
    tPCI_SYNC_IN
    Required assertion time of PORESET with stable clock applied to CLKIN
    when the device is in PCI host mode
    32
    —
    tCLKIN
    Required assertion time of PORESET with stable clock applied to
    PCI_SYNC_IN when the device is in PCI agent mode
    32
    —
    tPCI_SYNC_IN
    HRESET/SRESET assertion (output)
    512
    —
    tPCI_SYNC_IN
    HRESET negation to SRESET negation (output)
    16
    —
    tPCI_SYNC_IN
    Input setup time for POR config signals (CFG_RESET_SOURCE[0:2] and
    CFG_CLKIN_DIV) with respect to negation of PORESET when the device
    is in PCI host mode
    4—
    tCLKIN
    Input setup time for POR config signals (CFG_RESET_SOURCE[0:2] and
    CFG_CLKIN_DIV) with respect to negation of PORESET when the device
    is in PCI agent mode
    4—
    tPCI_SYNC_IN
    Input hold time for POR config signals with respect to negation of HRESET
    0—
    ns
    —
    Time for the device to turn off POR config signals with respect to the
    assertion of HRESET
    —4
    ns
    Time for the device to turn on POR config signals with respect to the
    negation of HRESET
    1—
    tPCI_SYNC_IN
    1, 3
    Notes:
    1. tPCI_SYNC_IN is the clock period of the input clock applied to PCI_SYNC_IN. When the device is In PCI host mode the
    primary clock is applied to the CLKIN input, and PCI_SYNC_IN period depends on the value of CFG_CLKIN_DIV. Refer
    MPC8360E PowerQUICC II Pro Integrated Communications Processor Reference Manual for more details.
    2. tCLKIN is the clock period of the input clock applied to CLKIN. It is only valid when the device is in PCI host mode. Refer
    MPC8360E PowerQUICC II Pro Integrated Communications Processor Reference Manual for more details.
    3. POR config signals consists of CFG_RESET_SOURCE[0:2] and CFG_CLKIN_DIV.
    Table 12. PLL and DLL Lock Times
    Parameter/Condition
    Min
    Max
    Unit
    Notes
    PLL lock times
    —
    100
    μs—
    DLL lock times
    7680
    122,880
    csb_clk cycles
    Notes:
    1. DLL lock times are a function of the ratio between the output clock and the coherency system bus clock (csb_clk). A 2:1
    ratio results in the minimum and an 8:1 ratio results in the maximum.
    2. The csb_clk is determined by the CLKIN and system PLL ratio. See Section 21, “Clocking,” for more information.
    
    
    
    
    
    


    


    

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MPC8360EVVALFG
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MPC8360CZUAJDG
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    相關(guān)代理商/技術(shù)參數(shù)
    		

    參數(shù)描述
    		

    
    

    
MPC8360CZUAGDG
功能描述:微處理器 - MPU 8360 TBGA NON-ENCRP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324

    

    
MPC8360CZUAGDGA
功能描述:微處理器 - MPU 8360 TBGA C NON-ENCRP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324

    

    
MPC8360CZUAGDHA
 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications

    

    
MPC8360CZUAGFGA
 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications

    

    
MPC8360CZUAGFHA
 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications

    

    
    
    
    
	
    	
    
    
     
     
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