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參數(shù)資料
| 型號(hào)： | MPC8358EZUAGDGA |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC II PRO 740TBGA |
| 標(biāo)準(zhǔn)包裝： | 21 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 400MHz |
| 電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 740-LBGA |
| 供應(yīng)商設(shè)備封裝： | 740-TBGA（37.5x37.5） |
| 包裝： | 托盤 |
Using the PowerQUICC II Pro MPC8358E to Build Small and Medium Enterprise Routers, Rev. 0
4
Freescale Semiconductor
Freescale Semiconductor Solutions
The MPC8358E incorporates the e300, 603e core which includes 32 Kbyte of L1 instruction and data caches, 32-bit
PCI bridge, four DMA channels, USB support, dual 32-bit DDR memory controller, a double precision floating
point unit and on-board memory management units. A block diagram of the MPC8358E is shown in Figure 2.
Figure 2. MPC8358E Block Diagram
The MPC8358E incorporates a new communications processor module referred to as the QUICC Engine, which
supports a wide range of protocols and new high speed interfaces. Additional enhancements include the e300
PowerPC core complex with 32 Kbytes of instruction and data cache, a dual 32-bit DDR memory controller, a 32-bit
PCI bridge, four DMA channels, USB support and an integrated security engine.
Flexibility in the QUICC Engine is ensured by the six unified communication controllers (UCCs) providing support
for Fast Ethernet, Gigabit Ethernet, HDLC, and ATM /Packet over SONET (POS) at up to OC-12 speeds. Four TDM
interfaces enable connection to four TDM links running at T1/E1 line rates or more. The UCCs can also be used to
support up to 6 T3/E3 connections.
In addition, the QUICC Engine can also support one UTOPIA level 2 or one POS-PHY interfaces, capable of
supporting up to124 Multi-PHY. The QUICC Engine also features an integrated 4-port, L2 Fast Ethernet switch
which can provide 4 priority levels on each port, Virtual LAN (VLAN) functionality, IGMP snooping, network
auto-negotiation function, store-and-forward switching and packet-error filtering.
Memory Controllers
GPCM/UPM/SDRAM
32 DDR Interface Unit
PCI Bridge
Local Bus
Bus Arbitration
DUART
Dual I2C
4 Channel DMA
Interrupt Controller
Protection & Configuration
System Reset
Clock Synthesizer
System Interface Unit
(SIU)
Local
Baud Rate
Generators
Parallel I/O
Accelerators
32-bit RISC CP
2 GMII/
RGMII/TBI/RTBI
6 MII/
RMII
4 TDM Ports
1 UL2/POS
(124 MPHY)
QUICC Engine
JTAG/COP
Power
Management
Timers
FPU
Classic G2 MMUs
32KB
D-Cache
32KB
I-Cache
Security Engine
e300 Core
PCI
DDR
MPC8358E
UCC
4
UCC
3
UCC
2
UCC
1
Multi-User
RAM
Serial DMA
&
2 Virtual
DMAs
Serial Interface
UCC
6
UCC
5
SPI
USB
Time Slot Assigner
SPI
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