參數(shù)資料
型號: MPC8343ECZQADDB
廠商: Freescale Semiconductor
文件頁數(shù): 77/80頁
文件大?。?/td> 0K
描述: IC MPU PWRQUICC II 620-PBGA
標準包裝: 36
系列: MPC83xx
處理器類型: 32-位 MPC83xx PowerQUICC II Pro
速度: 266MHz
電壓: 1.2V
安裝類型: 表面貼裝
封裝/外殼: 620-BBGA 裸露焊盤
供應商設備封裝: 620-PBGA(29x29)
包裝: 托盤
MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Freescale Semiconductor
79
Document Revision History
3
11/2006
Updated note in introduction.
In the features list in Section 1, “Overview,” updated DDR data rate to show 266 MHz for PBGA
parts for all silicon revisions.
In Table 57, “Suggested PLL Configurations,” added the following row:
Ref No: 823, SPMF: 1000, Core PLL: 0100011, 400-MHz Device Input Clock Freq: 33, CSB
Freq: 266, and Core Freq: 400.
In Section 23, “Ordering Information,” replicated note from document introduction.
2
8/2006
Changed all references to revision 2.0 silicon to revision 3.0 silicon.
Changed number of general purpose parallel I/O pins to 39 in Section 1, “Overview.”
Changed VIH minimum value in Table 35, “JTAG Interface DC Electrical Characteristics,” to
OVDD –0.3.
In Table 40, “PCI DC Electrical Characteristics,” changed high-level input voltage values to min =
2 and max = OVDD + 0.3; changed low-level input voltage values to min = (–0.3) and max = 0.8.
In Table 44, “PCI DC Electrical Characteristics,” changed high-level input voltage values to min
= 2 and max = OVDD + 0.3; changed low-level input voltage values to min = (–0.3) and max = 0.8.
In Table 44, “PCI DC Electrical Characteristics,” changed high-level input voltage values to min
= 2 and max = OVDD + 0.3; changed low-level input voltage values to min = (–0.3) and max = 0.8.
Updated DDR2 I/O power values in Table 5, “MPC8347EA Typical I/O Power Dissipation.”
1
4/2006
Removed Table 20, “Timing Parameters for DDR2-400.”
Changed ADDR/CMD to ADDR/CMD/MODT in Table 9, “DDR and DDR2 SDRAM Output AC
Timing Specifications,” rows 2 and 3, and in Figure 2, “DDR SDRAM Output Timing Diagram.
Changed Min and Max values for VIH and VIL in Table 40Table 44,“PCI DC Electrical
Characteristics.”
In Table 58, “MPC8343EA (PBGA) Pinout Listing,” and Table 52, “MPC8347EA (PBGA) Pinout
Listing,” modified rows for MDICO and MDIC1 signals and added note ‘It is recommended that
MDICO be tied to GRD using an 18
Ω resistor and MCIC1 be tied to DDR power using an 18 Ω
resistor.’
Table 58, “MPC8343EA (PBGA) Pinout Listing,” in row AVDD3 changed power supply from
“AVDD3” to ‘—.’
0
3/2006
Initial public release
Table 64. Document Revision History (continued)
Rev.
Number
Date
Substantive Change(s)
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MPC8343ECZQAGDB 功能描述:微處理器 - MPU 8347 PBGA ENCRYP W/ PB RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
MPC8343EVRADD 功能描述:IC MPU PWRQUICC II PRO 620-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:MPC83xx 標準包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA,F(xiàn)CBGA 供應商設備封裝:783-FCPBGA(29x29) 包裝:托盤
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