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| 型號(hào)： | MPC8275VRMIBA |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 11/83頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU POWERQUICC II 516-PBGA |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 系列： | MPC82xx |
| 處理器類(lèi)型： | 32-位 MPC82xx PowerQUICC II |
| 速度： | 266MHz |
| 電壓： | 1.5V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 516-BBGA |
| 供應(yīng)商設(shè)備封裝： | 516-FPBGA（27x27） |
| 包裝： | 托盤(pán) |
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MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 2
Freescale Semiconductor
19
AC Electrical Characteristics
This figure shows the SCC/SMC/SPI/I2C internal clock.
Figure 6. SCC/SMC/SPI/I2C Internal Clock Diagram
This figure shows TDM input and output signals.
Figure 7. TDM Signal Diagram
BRG_OUT
SCC/SMC/SPI/I2C input signals
SCC/SMC/SPI/I2C output signals
sp18a
sp19a
sp38a/sp39a
(See note)
Note: There are four possible timing conditions for SCC and SPI:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
Serial CLKin
TDM input signals
TDM output signals
sp20
sp21
sp40/sp41
Note: There are four possible TDM timing conditions:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
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