參數(shù)資料
型號(hào)： MPC8270ZUUPEA
廠商： Freescale Semiconductor
文件頁數(shù)： 23/83頁
文件大?。?/td> 0K
描述： IC MPU POWERQUICC II 480-TBGA
標(biāo)準(zhǔn)包裝： 21
系列： MPC82xx
處理器類型： 32-位 MPC82xx PowerQUICC II
速度： 450MHz
電壓： 1.5V
安裝類型： 表面貼裝
封裝/外殼： 480-LBGA
供應(yīng)商設(shè)備封裝： 408-TBGA（37.5x37.5）
包裝： 托盤
其它名稱： MPC8270ZUUPE
MPC8270ZUUPE-ND
MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 2
Freescale Semiconductor
3
Overview
This figure shows the block diagram of the SoC. Shaded portions are SoC-specific; see the notes below
the figure.
Figure 1. SoC Block Diagram
1.1
Features
The major features of the SoC are as follows:
Dual-issue integer (G2_LE) core
— A core version of the EC603e microprocessor
— System core microprocessor supporting frequencies of 166–450 MHz
— Separate 16 KB data and instruction caches:
– Four-way set associative
– Physically addressed
– LRU replacement algorithm
— Power Architecture-compliant memory management unit (MMU)
16 KB
G2_LE Core
I-Cache
I-MMU
16 KB
D-Cache
D-MMU
Communication Processor Module (CPM)
Timers
Parallel I/O
Baud Rate
Generators
32 KB
32-bit RISC Microcontroller
and Program ROM
Serial
DMAs
4 Virtual
IDMAs
60x-to-PCI
Bridge
Memory Controller
Clock Counter
System Functions
System Interface Unit
(SIU)
Local Bus
32 bits, up to 100 MHz
PCI Bus
32 bits, up to 66 MHz
or
MCC11 MCC2
FCC1
FCC2
FCC3
SCC1
SCC2
SCC3
SCC4/
SMC1
SMC2
SPI
I2C
Serial Interface2
3 MII or RMII
2 UTOPIA
Ports3
Ports
60x Bus
Microcode
IMA1
Data
Interrupt
Controller
Time Slot Assigner
TC Layer Hardware1
8 TDM Ports2
Non-Multiplexed
I/O
60x-to-Local
Bus Interface Unit
32 KB
Instruction
Notes:
1 MPC8280 only (not on MPC8270, the VR package, nor the ZQ package)
2 MPC8280 has 2 serial interface (SI) blocks and 8 TDM ports. MPC8270 and the VR and ZQ packages have
only 1 SI block and 4 TDM ports (TDM2[A–D]).
3 MPC8280, MPC8275VR, MPC8275ZQ only (not on MPC8270, MPC8270VR, nor MPC8270ZQ)
RAM
USB
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